Commit Graph

4368 Commits

Author SHA1 Message Date
Neil Armstrong
5d28bb016c ARM64: dts: meson-gxl: Add i2c nodes
Add i2c nodes clock attributes for Amlogic Meson GXL.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-11-15 12:05:30 -08:00
Neil Armstrong
973fbd55b5 ARM64: dts: meson-gxl: Add clock nodes
Add clock node for Amlogic Meson GXL.
The GXBB compatible is retained since the GXBB clock tree is used for now.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-11-15 12:05:27 -08:00
Neil Armstrong
fb0fe92294 ARM64: dts: meson-gxl: Add pinctrl nodes
Add pinctrl nodes and pin definitions for Amlogic Meson GXL.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: use GXBB include until GXL pinctrl support merged]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-11-15 12:05:24 -08:00
Neil Armstrong
998a9c8aa8 ARM64: dts: meson-gxbb: Move common nodes to meson-gx
Move common nodes between GXBB and GXL in to the common GX dtsi.
Leave the clock attributes in the GXBB dtsi for now.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-11-15 12:05:21 -08:00
Neil Armstrong
70db166a2b ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-11-15 12:04:56 -08:00
Alim Akhtar
eb708b0ff9 arm64: dts: Add ARM PMU node for exynos7
This patch adds ARM Performance Monitor Unit dt node for exynos7.
PMU provides various statistics on the operation of the CPU and
memory system at runtime, which are very useful when debugging or
profiling code. This enables the same.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
[krzk: Squashed with "Add level for cpu dt node for exynos7"]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2016-11-15 20:11:48 +02:00
David S. Miller
bb598c1b8c Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Several cases of bug fixes in 'net' overlapping other changes in
'net-next-.

Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-15 10:54:36 -05:00
Joseph Lo
c6299451bb arm64: defconfig: Enable Tegra186 SoC
Enable Tegra186 SoC.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-15 16:26:03 +01:00
William Wu
fe7f2de1c6 arm64: dts: rockchip: add usb2-phy otg-port support for rk3399
Add otg-port nodes for both u2phy0 and u2phy1. The otg-port can
be used for USB2.0 part of USB3.0 OTG controller.

Signed-off-by: William Wu <wulf@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-15 16:22:24 +01:00
John Garry
85f5bd9e77 arm64: dts: hisi: add refclk node to hip06 dts files for SAS
We will only maintain 1 dts for D03 and there are 50MHz
and 66MHz versions of D03: so we expect UEFI to update
refclk rate in the fdt at boot time.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-11-15 10:58:41 +00:00
John Garry
84ad1f5409 arm64: dts: hisi: disable sas0 and sas2 for d03
The SAS nodes sas0 and sas2 are not available on d03, so
disable them.

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-11-15 10:58:12 +00:00
John Garry
f65e786604 arm64: dts: hisi: fix hip06 sas am-max-trans quirk
The string for the am max transmissions quirk property
is not correct -> fix it.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-11-15 10:42:59 +00:00
Kefeng Wang
06b2967655 arm64: dts: hip06: Fix no reg property warning
Warning (unit_address_vs_reg): Node /soc/ethernet@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@1 has a unit name, but no reg property

Fix warning when build with W=1.

Cc: Kejian Yan <yankejian@huawei.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-11-15 10:40:26 +00:00
Kefeng Wang
4f357f94e1 arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Adding initial dt file for Hip07 D05 board, it is with dual socket
and each socket has two SCCLs(supper cpu cluster), one SCCL contains
four clusters and each cluster has quard Cortex-A72.

Since each SCCL has their own DDR controller, it could be treated as
a separate numa node. Thus, there are four numa nodes(one node with
sixteen core) on Hip07 SoC.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-11-15 10:36:17 +00:00
Kefeng Wang
4d75a171b6 arm64: dts: hip06: Correct hardware pin number of usb node
The ohci/ehci hardware pin number should be 640/641, correct them.

Fixes: commit aa8d3e74f5 ("arm64: dts: Add initial dts for Hisilicon Hip06 D03 board")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-11-15 10:36:13 +00:00
Hongtao Jia
236f794e44 arm64: dts: ls2080a: Add TMU device tree support for LS2080A
Also add nodes and properties for thermal management support.

Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-11-15 15:05:36 +08:00
Hongtao Jia
18486552b7 arm64: dts: ls1043a: Add TMU device tree support for LS1043A
Also add nodes and properties for thermal management support.

Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-11-15 15:05:31 +08:00
Neil Armstrong
88c9cb7c10 ARM64: configs: Activate Internal PHY for Meson GXL
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2016-11-14 08:40:47 -08:00
Robin Murphy
60c4e804ff arm64: Wire up iommu_dma_{map, unmap}_resource()
With no coherency to worry about, just plug'em straight in.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-11-14 16:58:36 +01:00
Elaine Zhang
1bc60beec0 arm64: dts: rockchip: add pd_sd power-domain node for rk3399
Add the sd power-domain, its qos area and assign it to the
sdmmc device node.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-14 16:20:44 +01:00
Elaine Zhang
a1907df27e arm64: dts: rockchip: add eMMC's power domain support for rk3399
Control power domain for eMMC via genpd to reduce power consumption.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-14 16:20:23 +01:00
Yakir Yang
578c0e7e83 arm64: dts: rockchip: add backlight support for rk3399 evb board
Add backlight node for evb board, perpare for panel device node.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-14 15:52:27 +01:00
Jeffy Chen
2afc1db0c5 arm64: dts: rockchip: add gmac needed pclk for rk3399 pd
This patch fixes that sometimes hang at start-up time of the system.
As the below log:
...
[   11.136543] calling  pm_genpd_debug_init+0x0/0x60 @ 1
[   11.141602] initcall pm_genpd_debug_init+0x0/0x60 returned 0 after 11 usecs
[   11.148558] calling  genpd_poweroff_unused+0x0/0x84 @ 1
<hang>

In some cases, the rk3399 should turn off the gmac power domain to save
power if some boards didn't register the gmac device node for rk3399.
Then, rk3399 need to make sure the gmac's pclk enabled if we need
operate the gmac power domain. (Due to the NOC had enabled always)

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-14 15:33:36 +01:00
Vladimir Murzin
2988509dd8 ARM: KVM: Support vGICv3 ITS
This patch allows to build and use vGICv3 ITS in 32-bit mode.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-11-14 10:32:54 +00:00
Greg Kroah-Hartman
8a0a8e1c42 Merge 4.9-rc5 into usb-next
We want/need the USB fixes in here as well, for testing and merge
issues.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-11-14 08:11:29 +01:00
Linus Torvalds
e234832afb Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Paolo Bonzini:
 "ARM fixes.  There are a couple pending x86 patches but they'll have to
  wait for next week"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: arm/arm64: vgic: Kick VCPUs when queueing already pending IRQs
  KVM: arm/arm64: vgic: Prevent access to invalid SPIs
  arm/arm64: KVM: Perform local TLB invalidation when multiplexing vcpus on a single CPU
2016-11-13 10:28:53 -08:00
Lukas Wunner
3552fdf29f efi: Allow bitness-agnostic protocol calls
We already have a macro to invoke boot services which on x86 adapts
automatically to the bitness of the EFI firmware:  efi_call_early().

The macro allows sharing of functions across arches and bitness variants
as long as those functions only call boot services.  However in practice
functions in the EFI stub contain a mix of boot services calls and
protocol calls.

Add an efi_call_proto() macro for bitness-agnostic protocol calls to
allow sharing more code across arches as well as deduplicating 32 bit
and 64 bit code paths.

On x86, implement it using a new efi_table_attr() macro for bitness-
agnostic table lookups.  Refactor efi_call_early() to make use of the
same macro.  (The resulting object code remains identical.)

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Andreas Noever <andreas.noever@gmail.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Jones <pjones@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-efi@vger.kernel.org
Link: http://lkml.kernel.org/r/20161112213237.8804-8-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-11-13 08:23:16 +01:00
Michael Scott
e19811a89d arm64: qcom: enable GPIOLIB in Kconfig
While debugging a kernel image size issue, I discovered that if all
non ARCH_QCOM configs in the ARM64 defconfig are disabled, the QCOM
pinctrl drivers will not be built.

The QCOM pinctrl drivers have a dependency on GPIOLIB which was being
selected when other ARCH configs were enabled, but ARCH_QCOM doesn't
select GPIOLIB directly.  Let's select GPIOLIB here to ensure the pinctrl
drivers are built for QCOM platforms.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 23:24:26 -06:00
Bastian Köcher
feeaf56ac7 arm64: dts: msm8994 SoC and Huawei Angler (Nexus 6P) support
Initial device tree support for Qualcomm MSM8994 SoC and
Huawei Angler / Google Nexus 6P support.

The device tree is based on the Google 3.10 kernel tree.

The device can be booted into the initrd with only one CPU running.

Signed-off-by: Bastian Köcher <mail@kchr.de>
[jeremymc@redhat.com: removed Kconfig, defconfig, move from Huawei to qcom dir]
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Tested-by: Michael Scott <michael.scott@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 22:57:56 -06:00
Jeremy McNicoll
6a6d1978f9 arm64: dts: msm8992 SoC and LG Bullhead (Nexus 5X) support
Initial device tree support for Qualcomm MSM8992 SoC and
LG Bullhead / Google Nexus 5X support.

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 22:56:43 -06:00
spjoshi@codeaurora.org
2f45d9fcd5 arm64: dts: msm8996: Add SMP2P and APCS nodes
Add SMP2P and APCS DT nodes required for Qualcomm ADSP
Peripheral Image Loader.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 22:56:42 -06:00
Bjorn Andersson
da3d658e28 arm64: dts: msm8996: Add SMEM DT nodes
Add SMEM and TCSR DT nodes on MSM8996.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 22:56:42 -06:00
spjoshi@codeaurora.org
13eb40eb42 arm64: dts: msm8996: Add reserve-memory nodes
Add reserve-memory nodes required for Qualcomm
Peripheral Image Loaders

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 22:56:41 -06:00
spjoshi@codeaurora.org
ee17692c20 arm64: dts: msm8996: Add SMEM reserve-memory node
Add DT node to carveout memory for shared memory region.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 22:56:41 -06:00
Srinivas Kandagatla
5582fcb382 arm64: dts: apq8016-sbc: add analog audio support with multicodec
This patch add support to Analog audio both Playback and Capture via
msm8916 WCD muti codec.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 22:56:07 -06:00
Jeremy McNicoll
a77a713395 arm64: configs: enable configs for msm899(2/4) basic support
Given the mimimal hardware support for msm899(2/4) currently.
A few config options are needed to allow for continued
development and booting.

The following are needed for continued development and
booting:
  -8994 pinctrl for serial support
  -Enable Global Glock Controller (gcc)

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-11-12 22:44:09 -06:00
Linus Torvalds
8233008f5d Merge tag 'pci-v4.9-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas:

 - Update MAINTAINERS for Intel VMD driver filename

 - Update Rockchip rk3399 host bridge driver DTS and resets

 - Fix ROM shadow problem that made some video device initialization
   fail

* tag 'pci-v4.9-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: VMD: Update filename to reflect move
  arm64: dts: rockchip: add three new resets for rk3399 PCIe controller
  PCI: rockchip: Add three new resets as required properties
  PCI: Don't attempt to claim shadow copies of ROM
2016-11-11 16:38:26 -08:00
Mark Rutland
c02433dd6d arm64: split thread_info from task stack
This patch moves arm64's struct thread_info from the task stack into
task_struct. This protects thread_info from corruption in the case of
stack overflows, and makes its address harder to determine if stack
addresses are leaked, making a number of attacks more difficult. Precise
detection and handling of overflow is left for subsequent patches.

Largely, this involves changing code to store the task_struct in sp_el0,
and acquire the thread_info from the task struct. Core code now
implements current_thread_info(), and as noted in <linux/sched.h> this
relies on offsetof(task_struct, thread_info) == 0, enforced by core
code.

This change means that the 'tsk' register used in entry.S now points to
a task_struct, rather than a thread_info as it used to. To make this
clear, the TI_* field offsets are renamed to TSK_TI_*, with asm-offsets
appropriately updated to account for the structural change.

Userspace clobbers sp_el0, and we can no longer restore this from the
stack. Instead, the current task is cached in a per-cpu variable that we
can safely access from early assembly as interrupts are disabled (and we
are thus not preemptible).

Both secondary entry and idle are updated to stash the sp and task
pointer separately.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: James Morse <james.morse@arm.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:46 +00:00
Mark Rutland
1b7e2296a8 arm64: assembler: introduce ldr_this_cpu
Shortly we will want to load a percpu variable in the return from
userspace path. We can save an instruction by folding the addition of
the percpu offset into the load instruction, and this patch adds a new
helper to do so.

At the same time, we clean up this_cpu_ptr for consistency. As with
{adr,ldr,str}_l, we change the template to take the destination register
first, and name this dst. Secondly, we rename the macro to adr_this_cpu,
following the scheme of adr_l, and matching the newly added
ldr_this_cpu.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:45 +00:00
Mark Rutland
57c82954e7 arm64: make cpu number a percpu variable
In the absence of CONFIG_THREAD_INFO_IN_TASK, core code maintains
thread_info::cpu, and low-level architecture code can access this to
build raw_smp_processor_id(). With CONFIG_THREAD_INFO_IN_TASK, core code
maintains task_struct::cpu, which for reasons of hte header soup is not
accessible to low-level arch code.

Instead, we can maintain a percpu variable containing the cpu number.

For both the old and new implementation of raw_smp_processor_id(), we
read a syreg into a GPR, add an offset, and load the result. As the
offset is now larger, it may not be folded into the load, but otherwise
the assembly shouldn't change much.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:45 +00:00
Mark Rutland
580efaa7cc arm64: smp: prepare for smp_processor_id() rework
Subsequent patches will make smp_processor_id() use a percpu variable.
This will make smp_processor_id() dependent on the percpu offset, and
thus we cannot use smp_processor_id() to figure out what to initialise
the offset to.

Prepare for this by initialising the percpu offset based on
current::cpu, which will work regardless of how smp_processor_id() is
implemented. Also, make this relationship obvious by placing this code
together at the start of secondary_start_kernel().

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:44 +00:00
Mark Rutland
623b476fc8 arm64: move sp_el0 and tpidr_el1 into cpu_suspend_ctx
When returning from idle, we rely on the fact that thread_info lives at
the end of the kernel stack, and restore this by masking the saved stack
pointer. Subsequent patches will sever the relationship between the
stack and thread_info, and to cater for this we must save/restore sp_el0
explicitly, storing it in cpu_suspend_ctx.

As cpu_suspend_ctx must be doubleword aligned, this leaves us with an
extra slot in cpu_suspend_ctx. We can use this to save/restore tpidr_el1
in the same way, which simplifies the code, avoiding pointer chasing on
the restore path (as we no longer need to load thread_info::cpu followed
by the relevant slot in __per_cpu_offset based on this).

This patch stashes both registers in cpu_suspend_ctx.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: James Morse <james.morse@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:44 +00:00
Mark Rutland
9bbd4c56b0 arm64: prep stack walkers for THREAD_INFO_IN_TASK
When CONFIG_THREAD_INFO_IN_TASK is selected, task stacks may be freed
before a task is destroyed. To account for this, the stacks are
refcounted, and when manipulating the stack of another task, it is
necessary to get/put the stack to ensure it isn't freed and/or re-used
while we do so.

This patch reworks the arm64 stack walking code to account for this.
When CONFIG_THREAD_INFO_IN_TASK is not selected these perform no
refcounting, and this should only be a structural change that does not
affect behaviour.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:44 +00:00
Mark Rutland
2020a5ae7c arm64: unexport walk_stackframe
The walk_stackframe functions is architecture-specific, with a varying
prototype, and common code should not use it directly. None of its
current users can be built as modules. With THREAD_INFO_IN_TASK, users
will also need to hold a stack reference before calling it.

There's no reason for it to be exported, and it's very easy to misuse,
so unexport it for now.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:43 +00:00
Mark Rutland
876e7a38e8 arm64: traps: simplify die() and __die()
In arm64's die and __die routines we pass around a thread_info, and
subsequently use this to determine the relevant task_struct, and the end
of the thread's stack. Subsequent patches will decouple thread_info from
the stack, and this approach will no longer work.

To figure out the end of the stack, we can use the new generic
end_of_stack() helper. As we only call __die() from die(), and die()
always deals with the current task, we can remove the parameter and have
both acquire current directly, which also makes it clear that __die
can't be called for arbitrary tasks.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:43 +00:00
Mark Rutland
a9ea0017eb arm64: factor out current_stack_pointer
We define current_stack_pointer in <asm/thread_info.h>, though other
files and header relying upon it do not have this necessary include, and
are thus fragile to changes in the header soup.

Subsequent patches will affect the header soup such that directly
including <asm/thread_info.h> may result in a circular header include in
some of these cases, so we can't simply include <asm/thread_info.h>.

Instead, factor current_thread_info into its own header, and have all
existing users include this explicitly.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:43 +00:00
Mark Rutland
3fe12da4c7 arm64: asm-offsets: remove unused definitions
Subsequent patches will move the thread_info::{task,cpu} fields, and the
current TI_{TASK,CPU} offset definitions are not used anywhere.

This patch removes the redundant definitions.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:42 +00:00
Mark Rutland
dcbe02855f arm64: thread_info remove stale items
We have a comment claiming __switch_to() cares about where cpu_context
is located relative to cpu_domain in thread_info. However arm64 has
never had a thread_info::cpu_domain field, and neither __switch_to nor
cpu_switch_to care where the cpu_context field is relative to others.

Additionally, the init_thread_info alias is never used anywhere in the
kernel, and will shortly become problematic when thread_info is moved
into task_struct.

This patch removes both.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2016-11-11 18:25:42 +00:00
Martin Sperl
ce2a6ca5c6 ARM64: bcm2835: dts: add thermal node to device-tree of bcm2837
Add the node for the thermal sensor of the bcm2837-soc
to the device tree.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2016-11-11 09:19:06 -08:00
Martin Sperl
ac178e4280 ARM64: bcm2835: add thermal driver to default config
Add the thermal driver for bcm2837 to list of compiled modules
in the default config.

Changelog:
 V7 -> V8: rebased

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2016-11-11 09:00:00 -08:00