Commit Graph

12882 Commits

Author SHA1 Message Date
Heiko Stuebner
b3e4b95366 ARM: dts: rockchip: Setup rk3066/rk3188 ethernet0 alias for u-boot
Add an ethernet0 alias for the RK3066/RK3188 mac interface so
that u-boot can find the device-node and fill in the mac address on
boards that support a wired network interface.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-19 05:54:58 +01:00
Sjoerd Simons
85ef8d611f ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
Add an ethernet0 alias for the RK3288 mac interface so
that u-boot can find the device-node and fill in the mac address on
boards that support a wired network interface.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-19 05:54:58 +01:00
Caesar Wang
784359b824 ARM: dts: rockchip: Add OTP gpio pinctrl to rk3288 tsadc node
Add the "init" anf "sleep" pinctrl as the OTP gpio state.
We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.

"init" pinctrl property is defined by Doug's Patch[0].

Patch[0]:
https://patchwork.kernel.org/patch/7454311/

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-19 05:50:42 +01:00
Heiko Stuebner
9849267811 ARM: dts: rockchip: temporarily remove emmc hs200 speed from rk3288 minnie
The eMMC of the minnie Chromebook doesn't like our current method of
tuning and while there are solutions on the horizon, they still need
investigating. Other Chromebooks tune just fine with the emmc, so
simply disable tuning on Minnie for now.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-11-19 05:38:06 +01:00
Pramod Kumar
3890ab2bfb dts: pinctrl: Add GPIO to Pinctrl pin mapping in DT
ASIU gpio controller's pins are muxed with pin-cntroller.
Add this mapping through property "gpio-ranges".

Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-18 10:33:08 -08:00
Ulrich Hecht
d537543b39 ARM: shmobile: alt: add VIN0, ADV7180 DT support
Adds the device board-dependent part of the VIN0 device and its ADV7180
video decoder on I2C1, and the interconnection between them.

Based on silk patch by Sergei Shtylyov.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-18 09:10:38 -08:00
Ulrich Hecht
7f81bf72c6 ARM: shmobile: alt: add I2C1 DT support
Defines the board-dependent part of the I2C1 device.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-18 09:10:24 -08:00
Simon Horman
22b160713c ARM: shmobile: alt: Add pfc pins to DT
PFC is already enabled on the r8a7794.
This adds pins for devices already enabled in DT on
the r8a7794 based alt board.

Based on work by Mitsuhiro Kimura and Hisashi Nakamura.

Cc: Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>
Cc: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
2015-11-18 09:09:10 -08:00
Vladimir Zapolskiy
aa29efb445 arm: dts: lpc32xx: move USB controller subdevices into own device node
NXP LPC32xx SoC has one USB OTG controller, which is supposed to work
with an external phy (default is NXP ISP1301).

Practically the USB controller contains 5 subdevices:
- host controller   0x3102 0000 -- 0x3102 00FF
- OTG controller    0x3102 0100 -- 0x3102 01FF
- device controller 0x3102 0200 -- 0x3102 02FF
- I2C controller    0x3102 0300 -- 0x3102 03FF
- clock controller  0x3102 0F00 -- 0x3102 0FFF

The USB controller can be considered as a "bus", because the
subdevices above are relatively independent, for example I2C
controller is the same as other two general purpose I2C controllers
found on SoC.

The change is not intended to modify any logic, but it rearranges
existing device nodes, in future it is planned to add a USB clock
controller device node into the same group.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:01:27 +02:00
Vladimir Zapolskiy
c1aa70072c arm: dts: lpc32xx: add device nodes for standard timers
NXP LPC32xx SoCs have 6 standard timers, add device nodes to describe
them.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:01:24 +02:00
Vladimir Zapolskiy
f83ee67fcf arm: dts: lpc32xx: add external memory controller device node
The change adds a description of ARM PrimeCell PL175 memory
controller, which is found on NXP LPC32xx SoCs.

The controller supports up to 4 static memory devices mapped to
0xE000 0000 - 0xE3FF FFFF physical memory area.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:01:19 +02:00
Vladimir Zapolskiy
cae5949067 arm: dts: ea3250/phy3250: specify phys memory offset for lpc32xx boards
In case if SDRAM memory region is not populated by a bootloader,
provide this value in device trees for EA3250 and PHY3250 boards.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:01:14 +02:00
Vladimir Zapolskiy
2a6c656331 arm: dts: lpc32xx: add device node for the second pwm controller
LPC32xx SoCs have two independent PWM controllers, they have different
clock parents, clock gates and even slightly different controls,
each of these two PWM controllers has one output channel. Due to
almost similar controls arranged in a row it is incorrectly assumed
that there is one PWM controller with two channels, fix this problem
in lpc32xx.dtsi, which at the moment prevents separate configuration
of different clock parents and gates for both PWM controllers.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:01:08 +02:00
Vladimir Zapolskiy
246d8fc33e arm: dts: lpc32xx: add reg property to cpu device node
According to device tree bindings for ARM cpus cpu node must contain a
reg property for enumeration scheme.

The change adds reg = <0x0> indicating that the processor does not
have CPU identification register and updates cell settings.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:01:05 +02:00
Vladimir Zapolskiy
25de7c9615 arm: dts: lpc32xx: add labels to all defined peripheral nodes
To simplify writing of dts files for all lpc32xx.dtsi users who adjust
device node properties, add labels to all defined peripheral device
nodes in lpc32xx.dtsi.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:00:58 +02:00
Vladimir Zapolskiy
1a24edd2ee arm: dts: lpc32xx: change include syntax to be C preprocessor friendly
The change replaces /include/ to #include in lpc32xx.dtsi and
derivatives, it is required, if C preprocessor is intended to be used
over dtsi/dts files, otherwise errors like one below are generated:

  Error: ea3250.dts:15.1-9 syntax error
  FATAL ERROR: Unable to parse input tree

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-11-18 18:00:53 +02:00
Peter Griffin
0014eb755e [media] c8sectpfe: Update binding to reset-gpios
reset-gpios is more clear than rst-gpio.

This change has been done as one atomic commit but it
does breaks compatability with older dtbs.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-11-18 13:32:58 -02:00
Peter Griffin
d90394b5eb [media] ARM: DT: STi: STiH407: Add c8sectpfe LinuxDVB DT node
This patch adds in the required DT node for the c8sectpfe
Linux DVB demux driver which allows the tsin channels
to be used on an upstream kernel.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-11-18 13:32:22 -02:00
Peter Griffin
6d5e581736 [media] ARM: DT: STi: stihxxx-b2120: Add pulse-width properties to ssc2 & ssc3
Adding these properties makes the I2C bus to the demodulators much
more reliable, and we no longer suffer from I2C errors when tuning.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2015-11-18 13:30:21 -02:00
Peter Chen
facf47ee6b ARM: dts: imx27.dtsi: change the clock information for usb
For imx27, it needs three clocks to let the controller work,
the old code is wrong, and usbmisc has not included clock handling
code any more. Without this patch, it will cause below data
abort when accessing usbmisc registers.

usbcore: registered new interface driver usb-storage
Unhandled fault: external abort on non-linefetch (0x008) at 0xf4424600
pgd = c0004000
[f4424600] *pgd=10000452(bad)
Internal error: : 8 [#1] PREEMPT ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Not tainted 4.1.0-next-20150701-dirty #3089
Hardware name: Freescale i.MX27 (Device Tree Support)
task: c7832b60 ti: c783e000 task.ti: c783e000
PC is at usbmisc_imx27_init+0x4c/0xbc
LR is at usbmisc_imx27_init+0x40/0xbc
pc : [<c03cb5c0>]    lr : [<c03cb5b4>]    psr: 60000093
sp : c783fe08  ip : 00000000  fp : 00000000
r10: c0576434  r9 : 0000009c  r8 : c7a773a0
r7 : 01000000  r6 : 60000013  r5 : c7a776f0  r4 : c7a773f0
r3 : f4424600  r2 : 00000000  r1 : 00000001  r0 : 00000001
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 0005317f  Table: a0004000  DAC: 00000017
Process swapper (pid: 1, stack limit = 0xc783e190)
Stack: (0xc783fe08 to 0xc7840000)

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Cc: <stable@vger.kernel.org> #v4.1+
Acked-by: Shawn Guo <shawnguo@kernel.org>
2015-11-18 14:07:54 +08:00
Simon Horman
0a3d058b8a ARM: shmobile: r8a7794: Use SoC specific binding for rcar-dmac nodes
Use the new SoC specific binding for rcar-dmac and the generic
binding as a fall-back in the r8a7794 device tree.

In general Renesas hardware is not documented to the extent where the
relationship between IP blocks on different SoCs can be assumed although
they may appear to operate the same way. Furthermore the documentation
typically does not specify a version for individual IP blocks. For these
reasons a convention of using the SoC name in place of a version and
providing SoC-specific compat strings has been adopted.

Although not universally liked this convention is used in the bindings for
most drivers for Renesas hardware. The purpose of this patch is to
update the Renesas R-Car DMA Controller nodes to follow this convention.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 11:26:31 -08:00
Simon Horman
061c6c624b ARM: shmobile: r8a7793: Use SoC specific binding for rcar-dmac nodes
Use the new SoC specific binding for rcar-dmac and the generic
binding as a fall-back in the r8a7793 device tree.

In general Renesas hardware is not documented to the extent where the
relationship between IP blocks on different SoCs can be assumed although
they may appear to operate the same way. Furthermore the documentation
typically does not specify a version for individual IP blocks. For these
reasons a convention of using the SoC name in place of a version and
providing SoC-specific compat strings has been adopted.

Although not universally liked this convention is used in the bindings for
most drivers for Renesas hardware. The purpose of this patch is to
update the Renesas R-Car DMA Controller nodes to follow this convention.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 11:26:26 -08:00
Simon Horman
e6d12b4990 ARM: shmobile: r8a7791: Use SoC specific binding for rcar-dmac nodes
Use the new SoC specific binding for rcar-dmac and the generic
binding as a fall-back in the r8a7791 device tree.

In general Renesas hardware is not documented to the extent where the
relationship between IP blocks on different SoCs can be assumed although
they may appear to operate the same way. Furthermore the documentation
typically does not specify a version for individual IP blocks. For these
reasons a convention of using the SoC name in place of a version and
providing SoC-specific compat strings has been adopted.

Although not universally liked this convention is used in the bindings for
most drivers for Renesas hardware. The purpose of this patch is to
update the Renesas R-Car DMA Controller nodes to follow this convention.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 11:26:21 -08:00
Simon Horman
4af0a6640c ARM: shmobile: r8a7790: Use SoC specific binding for rcar-dmac nodes
Use the new SoC specific binding for rcar-dmac and the generic
binding as a fall-back in the r8a7790 device tree.

In general Renesas hardware is not documented to the extent where the
relationship between IP blocks on different SoCs can be assumed although
they may appear to operate the same way. Furthermore the documentation
typically does not specify a version for individual IP blocks. For these
reasons a convention of using the SoC name in place of a version and
providing SoC-specific compat strings has been adopted.

Although not universally liked this convention is used in the bindings for
most drivers for Renesas hardware. The purpose of this patch is to
update the Renesas R-Car DMA Controller nodes to follow this convention.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 11:26:10 -08:00
Magnus Damm
d96011d077 ARM: shmobile: r8a7793: Add GPIO nodes to device tree
Add r8a7793 GPIO device nodes that are assumed to be identical
to r8a7791. This matches the data sheet for GPIO and MSTP bits.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 11:16:32 -08:00
Magnus Damm
876e7fb9f4 ARM: shmobile: r8a7794: alt: Enable VGA port
Enable the DU device and the VGA port available on the r8a7794
ALT board. The VGA portion of the ALT board is somewhat similar
to the Lager board but in case of ALT the DU1 pins are used
and the X2 clock has a reduced frequency.

This patch does not include any pinctrl (PFC) settings due to lack
of PFC DT integration on r8a7794. At this point the default state
of the boot loader is enough to keep the VGA port working without
changing any pinctrl settings.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 10:32:06 -08:00
Laurent Pinchart
46c4f13d04 ARM: shmobile: r8a7794: Add DU node to device tree
Add the DU device with a disabled state. Boards that want to enable the
DU need to specify the output topology.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 10:31:35 -08:00
Laurent Pinchart
9859cd3b15 ARM: shmobile: r8a7794: Add DU0 clock
The DU0 clock is an MSTP clock, child of the CPG ZX clock.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 10:29:55 -08:00
Javier Martinez Canillas
125fd67753 ARM: u300: remove regulator-compatible usage
The regulator-compatible property from the regulator DT binding was
deprecated and the correct approach is to use the node's name.

This patch has no functional changes since the values of the node's
name and the regulator-compatible match for all the regulators.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17 14:53:12 +01:00
Javier Martinez Canillas
25e8930ce8 ARM: ux500: remove regulator-compatible usage
The regulator-compatible property from the regulator DT binding was
deprecated and the correct approach is to use the node's name.

This patch has no functional changes since the values of the node's
name and the regulator-compatible match for all the regulators.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17 14:51:23 +01:00
Karsten Merker
c65d2359a8 ARM: dts: sunxi: sun6i-a31s-primo81.dts: add touchscreen axis swapping property
The MSI Primo81 has a display in portrait mode but a touchscreen
in landscape mode.  To have both of them use the same coordinate
system, the touchscreen-swapped-x-y property has to be set
for the touchscreen.

Signed-off-by: Karsten Merker <merker@debian.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:49 +01:00
Priit Laes
fef5218430 ARM: dts: sun4i: gemei-g9: Enable sun4i audio codec support
Gemei G9 has internal speakers and headphone jack. Audio switching
from internal speakers to headphones is automatically handled by
extra FT2012Q audio amplifier chip that works out of the box.

Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Priit Laes
108f780a70 ARM: dts: sun4i: gemei-g9: Use reg_ldo2 instead of reg_vcc3v0
ADC seems to be using ldo2 for reference voltage.

Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Priit Laes
bc1e271869 ARM: dts: sun4i: gemei-g9: Convert to use axp209 regulator nodes
Add regulator nodes for axp209 using the axp209.dtsi include.

Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Hans de Goede
e6c9b75453 ARM: dts: sun4i: inet9f-rev03: Add support for game buttons / joysticks
The inet9f-rev03 tablet has multiple fire-buttons / direction controls,
add support for these using the same axis mapping as ps2 compatible game
controllers with the same stick / button layout use.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Jelle van der Waa
111af75565 ARM: dts: sun7i: Enable audio codec on pcDuino
Enable the on-chip audio codec

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Aleksei Mamlin
581de703ef ARM: dts: sun7i: Enable audio codec on Wexler TAB7200 tablet.
Enable on-chip audio codec on the Wexler TAB7200 tablet.

Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Marcus Weseloh
18f17cb7d7 ARM: dts: sun4i: Enable audio codec on Olimex A20-SOM-EVB
Enable the on-chip audio codec on the Olimex A20-SOM-EVB

Signed-off-by: Marcus Weseloh <mweseloh42@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Lawrence Yu
5058ec4a95 dts: sun6i: yones toptech bs1078 v2: Add AXP221 support to dts
Enable the axp221 PMIC chip in the dts file.

Allows board to power off correctly from the poweroff command

This board requires dc1sw to be enabled in order to provide a power source
for the 5V DCDC converter that powers USB2.

This board uses dldo1 for 3.3V wifi power

This board requires dldo3 to be enabled at 2.8V in order to provide voltage
to the pullup resistors for the i2c0 bus.

Signed-off-by: Lawrence Yu <lyu@micile.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Stefan Roese
329f25b343 arm: sun7i: Add sun7i-a20-icnova-swac.dts
This baseboard from SWAC is equipped with the ICnova-A20 SoM from
Incircuit. This board is equipped with the following interfaces /
devices:

- 512 MiB SDRAM
- 4 GiB MLC NAND (Micron MT29F32G08CBACAWP or Hynix H27UBG8T2BTR)
- USB host
- LCD 800x480
- HDMI
- CAN

Note that the NAND support is still missing. As its currently not
supported in mainline for sunxi and especially for these MLC
devices.

The original plan was to also provide a dtsi for the ICnova SoM,
to put all the SoM internal nodes / properties there. But as I
don't have a clear overview of the SoM specific and baseboard
specific differences, I'm putting all in one dts for now. Once
somebody pushed support for some other baseboard using the
A20 SoM from Incircuit (e.g. the ADB4006 reference design), this
should be separated.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marcus Heuer <marcus.heuer@swac.de>
[maxime: Fixed CPU regulator upper voltage boundary]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Adam Sampson
e04a61c04a ARM: sun7i: dt: Enable audio codec on pcDuino V3 Nano
The pcDuino V3 Nano has a 3.5mm TRRS jack socket for audio, using the
CTIA standard pinout, connected to HPOUTL, HPOUTR, HPCOM/HPCOMFB and
MICIN1/VMIC (via appropriate RC networks) on the A20. The PH00 GPIO is
wired for headphone plug detection: it reads 0 when nothing's plugged
in, and 1 when a plug is inserted.

LINEINL/R and FMINL/R are not connected.

Signed-off-by: Adam Sampson <ats@offog.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-17 09:40:07 +01:00
Sudeep Holla
506822eaf1 ARM: ux500: replace legacy *,wakeup property with wakeup-source
Though the keyboard and other driver will continue to support the legacy
"gpio-key,wakeup", "linux,wakeup" boolean property to enable the wakeup
source, "wakeup-source" is the new standard binding.

This patch replaces all the legacy wakeup properties with the unified
"wakeup-source" property in order to avoid any futher copy-paste
duplication.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17 09:37:09 +01:00
Linus Walleij
c80b4010d7 ARM: ux500: Assign proper sensor IRQs for Snowball
The Snowball gyro and magnetometer DRDY (data ready) lines are used
as interrupt triggers by the IIO subsystem, triggering new data
retrieveal on edges on this signal. Thus assign them as the primary
interrupt in the device tree. The "other interrupt" coming out of
the sensors is for alarms and similar complex events, the DRDY is
for periodic measures, which is what we want.

After this the generic_buffer tool from IIO tools gives a nice
stream of readings after enabling the desired channels in sysfs.

Cc: Denis Ciocca <denis.ciocca@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17 09:37:09 +01:00
Linus Walleij
250656b4bc ARM: ux500: push down Rohm TS to STUIB
The Rohm touchscreen reset and IRQ lines were registered and
configured at the HREF board level of the design, but it is an
integral part of the UIB (User Interface Board). Fix this by
pushing down the pin control node to the u8500 UIB file.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17 09:37:09 +01:00
Jon Mason
ccf0b5e371 ARM: dts: bcm5301x: Add BCM SVK DT files
Add device tree files for Broadcom Northstar based SVKs.  Since the
bcm5301x.dtsi already exists, all that is necessary is the dts files to
enable the UARTs.  With these files, the SVKs are able to boot to shell.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:48:59 -08:00
Jon Mason
1a9d53caba ARM: dts: NSP: Add TWD Support to DT
Add support for the ARM TWD Timer and Watchdog to the Northstar Plus
device tree.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:48:56 -08:00
Jon Mason
41254754aa ARM: dts: NSP: Add NAND Support to DT
Add NAND support to the device tree for the Broadcom Northstar Plus SoC.
Since no driver changes are needed to enable this hardware, only the
device tree changes are required to make this functional.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:48:54 -08:00
Jon Mason
1dbcfb228b ARM: dts: NSP: Add PCI support
Add PCI support to the Northstar Plus SoC.  This uses the existing
pcie-iproc driver.  So, all that is needed is device tree entries in the
DTS.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-11-16 10:48:53 -08:00
Ludovic Desroches
13e2a6fd31 ARM: at91/dt: sama5d2 Xplained: add several devices
Add sdmmc and flexcom devices

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-11-16 15:53:06 +01:00
Alexandre Belloni
1392f7c905 ARM: at91/dt: remove bootargs
Passing earlyprintk in the bootargs may crash the board as it depends on
having a sane DEBUG_UART_PHYS configured which is not always the case.

Also remove ignore_loglevel

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-11-16 15:53:05 +01:00