The boards use a TI variant of the PCF8575 so specify that
in the compatible string.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per the data sheet starting from SPRUHQ0H (Nov 2015 - Latest[1]),
VDD_CORE can vary from 0.85v to 1.15v for AVS class0. VDD GPU/DSP
et.al. can range from 0.85v to 1.25V with AVS class0
Since dynamic voltage scaling is disabled for DRA7/AM57xx SoCs for
all SoC rails other than MPU, the bootloader is responsible for
setting up the AVS class0 voltage, however, with wrong voltage machine
constraints in dtb, regulator framework will lower the voltage below
the required voltage levels for certain samples in production flow.
This can cause catastrophic failures which can be pretty hard to
identify.
Update board files which don't match required specification.
[1] http://www.ti.com/product/AM5728/datasheet/specifications#SPRT637-7340
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ldo4_reg is connected to DSS, and should always be 1.8V. However the The
dts defines a range of 1.5V-1.8V, which requires somethings to set the
actual voltage at runtime. Currently we set the voltage in omapdss
driver.
As the voltage must always be 1.8V, let's just define the range to 1.8V
so that the driver doesn't need to deal with the voltage. In fact, the
driver should not touch the voltage, except in the cases where the
voltage needs to be changed at runtime.
I presume the situation is the same for ldo1_reg, used for CSI, although
I think it is not currently used in the mainline.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ldo4_reg is connected to DSS, and should always be 1.8V. However the
The dts defines a range of 1.5V-1.8V, which requires somethings to set
the actual voltage at runtime. Currently we set the voltage in omapdss
driver.
As the voltage must always be 1.8V, let's just define the range to 1.8V
so that the driver doesn't need to deal with the voltage. In fact, the
driver should not touch the voltage, except in the cases where the
voltage needs to be changed at runtime.
I presume the situation is the same for ldo1_reg, used for CSI, although
I think it is not currently used in the mainline.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Doing so saves quite a bit of code in the driver.
For more information on the 'reserved-memory' bindings see:
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
Suggested-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch supplies the Mailbox Controller nodes. In order to
request channels, these nodes will be referenced by Mailbox
Client nodes.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
You'll notice that the voltage cell is populated with 0's. Voltage
information is very platform specific, even depends on 'cut' and
'substrate' versions. Thus it is left blank for a generic (safe)
implementation. If other nodes/properties are provided by the
bootloader, the ST CPUFreq driver will over-ride these generic
values.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
When compiled with "W=1", dtc complains: e.g.
"Warning (unit_address_vs_reg):
Node /soc/ipu@02800000/port@2/endpoint@0
has a unit name, but no reg property"
Endpoint nodes don't have a reg property, and the addresses
in their node names are ordinals without any special meaning
so remove them and swap them for semantic node names.
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015):
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf
states the following:
"LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation
up to 396 MHz."
So fix the entry by adding the 25mV margin value as done in the other
entries of the table, which results in 1.15V for 396MHz operation.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
198MHz is a valid operating point for mx6sx.
Add entries for VDD_ARM_CAP and VDD_SOC_CAP voltages for 198MHz according
to the imx6sx datahseet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SXIEC.pdf
(a 25mV offset is added to the minimum allowed values for safety).
These values also match the ones from the NXP kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Merge "ARM: dts: Add OXNAS Platform Bindings" from Neil Armstrong:
* tag 'ox810se-arm-dt-v4.6-rc3' of https://github.com/superna9999/linux:
ARM: boot: dts: Add Western Digital My Book World Edition device tree
dt-bindings: Add Western Digital to vendor prefixes
dt-bindings: Add OXNAS bindings
ARM: boot: dts: Add Oxford Semiconductor OX810SE dtsi
dt-bindings: Add Oxford Semiconductor to vendor prefixes
dt-bindings: irq: arm,versatile-fpga: add compatible string for OX810SE SoC
Application Notes 399 and 400 shares the same memory map and
features. Both are shipped with Cortex-M7 and have the same peripheral
as AN385/AN386, but with different location of PSRAM and Ethernet
controller.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Application Notes 385 and 386 shares the same memory map and features
except the CPU is used. AN385 is supplied with Cortex-M3 CPU and AN386
is supplied with Cortex-M4.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Renesas ARM Based SoC Fixes for v4.6
* Correct preset_lpj calculation which may lead to too short delays
* Correct handling of optional clocks on r8a7791 to restore
access to the serial port the porter board
This is a backmerge of v4.6 fixes, to avoid a merge conflict between 4.6
and our next/dt branch.
* tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
Fix a typo on PIN_PD24 for UTXD2 and FLEXCOM4_IO3 which were
wrongly linked to PIN_PD23).
Signed-off-by: Florian Vallee <fvallee@eukrea.fr>
Fixes: 7f16cb676c ("ARM: at91/dt: add sama5d2 pinmux")
Cc: stable@vger.kernel.org # v4.4+
[nicolas.ferre@atmel.com: add commit message, changed subject]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add Western Digital My Book World Edition device tree based on
Oxford Semiconductor OX810SE SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The BA16 module has a PMIC that uses the WDOG_B output from iMX6 to
reset the system on a watchdog timeout. Configure the watchdog to assert
the external reset signal (WDOG_B) using fsl,ext-reset-output property.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Previously the LDB_DIx clocks could be specified in the ldb node. With
the ERR009219 errata fix applied, the ldb_di clocks now needs to be
specified in the clks node to ensure the clocks are setup early in the
boot process.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The default monitor that ships with B850v3 requires a 65MHz pixel clock.
65MHz can not be achieved using PLL3 (480MHz/7=68.5MHz). Hence set the
LDB_DIx clock source to PLL5. Since PLL5 is already in use by IPU1_DIx,
set the clock source for IPU1_DIx to PLL2_PFD2 to allow simultaneous
display on both LVDS and HDMI interface.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove ldb panel entry for the following reasons:
- The b850v3 has an onboard LVDS to DisplayPort converter (STDP4028). So
we should not limit the monitors that can be connected by hardcoding the
auo,b133htn01 1080p panel.
- The default resolution on the LVDS interface needs to be WXGA or less.
Otherwise when a 1080p monitor is connected to the HDMI port there is no
output on both the LVDS and HDMI ports since a single IPU on i.MX6 can
not handle two 1080p displays. With the panel entry removed from the
devicetree, drm driver defaults the resolution on LVDS interface to XGA.
Once in userspace, applications can set the desired resolution on LVDS
interface over IPU2 CRTC.
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable dm814x and dra62x clock driver. This branch has a dependency
to the clk-ti branch from the Linux clk tree for the ADPLL clock driver.
Otherwise things won't keep booting properly when we flip over to use
the clock driver instead of fixed clocks set up by the bootloader.
* tag 'omap-for-v4.6/dt-ti81xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add clocks for dm814x ADPLL
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "ARM: Keystone DTS for 4.7" from Santosh Shilimkar:
- Remainder k2-* rename to keystone-*
- PSCI node info
- SPI alias nodes for bootloaders
* tag 'keystone_dts_for_4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: dts: add psci command definition
ARM: dts: keystone: Add aliases for SPI nodes
ARM: dts: k2*: Rename the k2* files to keystone-k2* files
Merge "ARMv7 Vexpress updates/fixes for v4.7" from Sudeep Holla:
1. Support for external expansion bus useful for additional hardware
e.g. LogicTile Express daughterboards (Brian Starkey)
2. Fix for device node name unit-address presence/absence warnings
enabled in recently update DTC (Sudeep Holla)
* tag 'vexpress-for-v4.7/updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: Add external expansion bus to DT
ARM: dts: vexpress: fix node name unit-address presence warnings
Merge "Renesas ARM Based SoC DT Updates for v4.7" from Simon Horman:
* Configure NMI key as wakeup source in DT of kzm9g board
* Add SDHI support to DT of gose board
* Add support of UHS-I SDR-50 for SDHI to DT of r8a7790 SoC
* Correct interrupt type for ARM TWD in DT of r8a7779 and sh73a0 SoCs
* Add IIC support to DT of r8a7794 SoC
* Add CAN support to DT of r8a7793 and r8a7794 SoCs
* Add SCIF2 support to r8a7790 device tree
* Use CAN, JPU and USB3.0 fallback compatibility string
in DT of r8a7791 and r8a7790 SoCs
* tag 'renesas-dt-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
ARM: dts: gose: Enable SDHI controllers
ARM: dts: r8a7793: Add SDHI controllers
ARM: dts: r8a7790: fix max-frequency for SDHI
ARM: dts: kzm9g: Configure NMI key as wake-up source
ARM: dts: r8a7790: lager: Enable UHS-I SDR-50
ARM: dts: r8a7790: Set maximum frequencies for SDHI clocks
ARM: dts: r8a7791: Use USB3.0 fallback compatibility string
ARM: dts: r8a7790: Use USB3.0 fallback compatibility string
ARM: dts: r8a7779: Correct interrupt type for ARM TWD
ARM: dts: sh73a0: Correct interrupt type for ARM TWD
ARM: dts: r8a7794: Add IIC nodes
ARM: dts: r8a7794: add IIC clocks
ARM: dts: r8a7793: add CAN nodes to device tree
ARM: dts: r8a7793: add CAN clocks to device tree
ARM: dts: r8a7794: add CAN nodes to device tree
ARM: dts: r8a7794: add CAN clocks to device tree
ARM: dts: r8a7790: use fallback can compatibility string
ARM: dts: r8a7791: use fallback can compatibility string
ARM: dts: r8a7790: Add SCIF2 device node
ARM: dts: r8a7790: Add SCIF2 clock
...
Enable dm814x and dra62x clock driver. This branch has a dependency
to the clk-ti branch from the Linux clk tree for the ADPLL clock driver.
Otherwise things won't keep booting properly when we flip over to use
the clock driver instead of fixed clocks set up by the bootloader.
* tag 'omap-for-v4.6/dt-ti81xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Add clocks for dm814x ADPLL
Fix off by one error in da850 device tree in
the number of INTC interrupts.
Signed-off-by: David Lechner <david@lechnology.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: commit message update]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Disable mdio and eth0 in da850.dtsi file. All other
devices are disabled by default and not all boards
will use these devices, so these should be disabled too.
da850-evm.dtb already had status = "okay" for these devices.
da850-enbw-cmc.dts did not, so they were added.
Signed-off-by: David Lechner <david@lechnology.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: commit description updates]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The VExpress development platform has an external expansion bus which
can be used for additional hardware (e.g. LogicTile Express daughter
boards).
Add this bus to the VExpress CoreTile device-trees.The bus is described
for a CoreTile occupying site 1.
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Brian Starkey <brian.starkey@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Commit b993734718 ("scripts/dtc: Update to upstream version 53bf130b1cdd")
added warnings on node name unit-address presence/absence mismatch in
the device trees.
This patch fixes those warning on all the vexpress platforms where
unit-address is present in node name while the reg/ranges property is
not present.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
In order to be standard to manage for rockchip SoCs, move the thermal
data into rk3288 dtsi, we needn't to add a new file for thermal.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a GPIO key with wake-up capability for the NMI button.
This allows to wake up the system from s2ram without relying on the
buttons on the optional switch board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The clock binding for the main clock controller was changed to an
indexed controller style binding on request of the clk
maintainers. This updates the dtsi to use the new bindings.
Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Qualcomm Device Tree Changes for v4.7" from Andy Gross:
* Add DB600C support
* Add IPQ4019 support
* Add additional nodes for APQ8064
* Fix APQ8064 pinctrls for i2c/spi
* Add MSM8974 nodes for smp2p and smd
* Modify MSM8974 memory reserve for rfsa and rmtfs
* Add support for BQ27541 on Nexus7
* tag 'qcom-dt-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (30 commits)
device-tree: nexus7: Add bq27541 battery interface to dts
ARM: dts: db600c: add support to magnetometer
ARM: dts: db600c: add spi support
ARM: dts: db600c: add i2c support
ARM: dts: db600c: Add on board leds support
ARM: dts: db600c: add on board sata support.
ARM: dts: db600c: add pcie support
ARM: dts: db600c: add usb support
ARM: dts: db600c: Add eMMC and SD card support
ARM: dts: db600c: add pmic regulator supplies
ARM: dts: db600c: add board support with serial
ARM: dts: apq8064: add gsbi7 i2c support
ARM: dts: apq8064: add support to gsbi1 uart
ARM: dts: apq8064: fix the pinctrls for i2c and spi
ARM: dts: qcom: apq8064: Add smd node and all edges
ARM: dts: qcom: apq8064: Add complete smsm node
ARM: dts: qcom: apq8064: Add syscon for sic-non-secure
ARM: dts: msm8974: Add modem smp2p and smd nodes
ARM: dts: msm8974: Add node for second i2c from blsp1
ARM: dts: msm8974: Split efs in rfsa and rmtfs
...
