Kalle Valo says:
====================
wireless-drivers patches for 4.6
Major changes:
ath10k
* dt: add bindings for ipq4019 wifi block
* start adding support for qca4019 chip
ath9k
* add device ID for Toshiba WLM-20U2/GN-1080
* allow more than one interface on DFS channels
bcma
* move flash detection code to ChipCommon core driver
brcmfmac
* IPv6 Neighbor discovery offload
* driver settings that can be populated from different sources
* country code setting in firmware
* length checks to validate firmware events
* new way to determine device memory size needed for BCM4366
* various offloads during Wake on Wireless LAN (WoWLAN)
* full Management Frame Protection (MFP) support
iwlwifi
* add support for thermal device / cooling device
* improvements in scheduled scan without profiles
* new firmware support (-21.ucode)
* add MSIX support for 9000 devices
* enable MU-MIMO and take care of firmware restart
* add support for large SKBs in mvm to reach A-MSDU
* add support for filtering frames from a BA session
* start implementing the new Rx path for 9000 devices
* enable the new Radio Resource Management (RRM) nl80211 feature flag
* add a new module paramater to disable VHT
* build infrastructure for Dynamic Queue Allocation
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This series adds initial support for the Amlogic S905 based
Tronsmart Vega S95 Pro, Meta and Telos TV boxes.
- Add new DTS to enable support for the boards
- Add documentation for compatibles and vendor prefix
* tag 'for-v4.6/gxbb-dt' of https://github.com/carlocaione/linux-meson:
ARM64: dts: amlogic: Add Tronsmart Vega S95 configs
Documentation: devicetree: amlogic: Document Tronsmart Vega S95 boards
ARM64: dts: Prepare configs for Amlogic Meson GXBaby
Documentation: devicetree: amlogic: Document Meson GXBaby
devicetree: bindings: Add vendor prefix for Tronsmart
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung Exynos ARM64 improvements for v4.6:
1. Remove separate ARCH_EXYNOS7 symbol and consolidate it into
one ARCH_EXYNOS.
This depends on clk tree: removal of last presence of ARCH_EXYNOS7.
* tag 'samsung-soc64-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: EXYNOS: Consolidate ARCH_EXYNOS7 symbol into ARCH_EXYNOS
clk: samsung: Don't build ARMv8 clock drivers on ARMv7
clk: samsung: Enable COMPILE_TEST for Samsung clocks
clk: Move vendor's Kconfig into CCF menu section
clk: mediatek: Fix memory leak on clock init fail
clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
clk: xgene: Remove return from void function
clk: xgene: Add SoC and PMD PLL clocks with v2 hardware
Documentation: Update APM X-Gene clock binding for v2 hardware
clk: s2mps11: remove redundant code
clk: s2mps11: remove redundant static variables declaration
clk: s2mps11: allocate only one structure for clock init
clk: s2mps11: merge two for loops in one
clk-divider: make sure read-only dividers do not write to their register
clk: tango4: rename ARCH_TANGOX to ARCH_TANGO
clk: scpi: Fix checking return value of platform_device_register_simple()
clk: mvebu: Mark ioremapped memory as __iomem
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu dt64 for 4.6 (part 2)
Add support for the Armada 7K and 8K SoCs and the Armada 8040 DB board
* tag 'mvebu-dt64-4.6-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: re-order Device Tree nodes for Armada AP806
arm64: dts: marvell: update Armada AP806 clock description
arm64: dts: marvell: add Device Tree files for Armada 7K/8K
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds support for Freescale's (now NXP's) FXLS8471Q accelerometer.
We use MMA8451Q's configuration because for what the driver supports,
FXLS8471Q is the same.
Support for FXLS8471Q's features (fast SPI interface and a larger FIFO,
among others) can be added to this driver anytime.
See it's datasheet for the details:
http://cache.nxp.com/files/sensors/doc/data_sheet/FXLS8471Q.pdf
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Renesas sound driver user needs to read its datasheet when create DT.
But it is difficult to understand, because it has many modules
(SRC/CTU/MIX/DVC/SSIU/SSI/AudioDMAC/AudioDMACperiperi),
and many features (Asynchronous/Synchronous mode on SRC, CTU matrix,
DVC volume settings feature, Multi-SSI/TDM-SSI, etc).
This patch adds simplified explanation to help setting/understanding.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The cavium,pci-thunder-ecam devices are exactly ECAM-based PCI root
complexes. These root complexes (loosely referred to as ECAM units in the
hardware manuals) are used to access the Thunder on-chip devices. They
are special in that all the BARs on devices behind these root complexes are
at fixed addresses.
Add a driver for these devices that synthesizes Enhanced Allocation (EA)
capability entries for each BAR.
Since this EA synthesis is needed for exactly two chip models, we can hard-
code some assumptions about the device topology and the layout of the
config space of specific DEVFNs in the driver.
[bhelgaas: changelog, whitespace]
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
The root complexes used to access off-chip PCIe devices (called PEM units
in the hardware manuals) on some Cavium ThunderX processors require quirky
access methods for the config space of the PCIe bridge.
Add a driver to provide these config space accessor functions. Use the
pci-host-common code to configure the PCI machinery.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Based on the Allwinner A64 user manual and on the previous sunxi
pinctrl drivers this introduces the pin multiplex assignments for
the ARMv8 Allwinner A64 SoC.
Port A is apparently used for the fixed function DRAM controller, so
the ports start at B here (the manual mentions "n from 1 to 7", so
not starting at 0).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ARM: OMAP2+: critical DRA7xx fix for v4.5-rc
Force the DRA7xx Ethernet internal clock source to stay enabled
per TI erratum i877:
http://www.ti.com/lit/er/sprz429h/sprz429h.pdf
Otherwise, if the Ethernet internal clock source is disabled, the
chip will age prematurely, and the RGMII I/O timing will soon
fail to meet the delay time and skew specifications for 1000Mbps
Ethernet.
This fix should go in as soon as possible.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/omap-critical-fixes-for-v4.5-rc/20160307014209/
* tag 'for-v4.5-rc/omap-critical-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending:
ARM: dts: dra7: do not gate cpsw clock due to errata i877
ARM: OMAP2+: hwmod: Introduce ti,no-idle dt property
Signed-off-by: Olof Johansson <olof@lixom.net>
In the add-on file for the GIC dealing with the RealView family
we currently only handle the PB11MPCore, let's extend this to
manage the RealView EB ARM11MPCore as well. The Revision B of the
ARM11MPCore core tile is a bit special and needs special handling
as it moves a system control register around at random.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch adds support for the mcp23s18 which is very similar to
the mcp23s17. A couple of control bits are not the same.
Notable IOCON_HAEN (s17 only) & IOCON_INTCC. Which can be ignored.
Patch changes the following:
- Add mcp23s18 types.
- Always set mirror bit if the dts defines mcp23s18. regardless of type.
Mirror bit is ignored on 8 bit devices anyway.
- In mcp23s08_probe use chip.ngpio instead of logic based on type
to determine number of gpio lins to increment by. This is set
appropiately by the call to mcp23s08_probe_one.
- Add mcp23s18 to device tree documentation.
- Remove statement that irqs don't work for spi. They do.
Tested with mcp23s18.
Signed-off-by: Phil Reid <preid@electromag.com.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The altr,interrupt-trigger property is not used by the driver.
Instead, altr,interrupt-type is used by the driver and the driver
does not probe if this property is not specified. Therefore, it
is expected that there are no users of the -trigger property in
the wild and that this is a typo in the documentation for the
altera-pio controller. This patch fixes the typo.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tien Hock Loh <thloh@altera.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
