xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
649,779 Commits 2 Branches 0 Tags
ae65a26dd387fec18dd1645fbb4b901b379cd6f5
Commit Graph

19 Commits

Author SHA1 Message Date
Thor Thayer
5e40cd4d25 Documentation: dt: socfpga: Add Arria10 SD-MMC EDAC binding 
Add the device tree bindings needed to support the Altera SD-MMC
FIFO buffers EDAC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1470153381-20517-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-08-08 15:21:09 +02:00
Thor Thayer
d61d96f1c9 Documentation: dt: socfpga: Add Arria10 QSPI EDAC binding 
Add the device tree bindings needed to support the Altera QSPI
FIFO buffer on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1468512408-5156-5-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-08-08 05:59:34 +02:00
Thor Thayer
75e644c77d Documentation: dt: socfpga: Add Arria10 USB EDAC binding 
Add the device tree bindings needed to support the Altera USB
FIFO buffer on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1468512408-5156-4-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-08-08 05:59:33 +02:00
Thor Thayer
e03934173a Documentation: dt: socfpga: Add Arria10 DMA EDAC binding 
Add the device tree bindings needed to support the Altera DMA FIFO
buffer on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1468512408-5156-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-08-08 05:59:31 +02:00
Thor Thayer
9dd344aed7 Documentation: dt: socfpga: Add Arria10 NAND EDAC binding 
Add the device tree bindings needed to support the Altera NAND FIFO
buffers on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1468512408-5156-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-08-08 05:59:30 +02:00
Thor Thayer
f103ad1556 Documentation: dt: socfpga: Add Arria10 Ethernet binding 
Add the device tree bindings needed to support the Altera Ethernet FIFO
buffers on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1466603939-7526-6-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-06-24 21:16:18 +02:00
Thor Thayer
47d78000eb Documentation: dt: socfpga: Add interrupt-controller to ecc-manager 
Designate the ECC Manager as an interrupt controller and add child
interrupts.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-doc@vger.kernel.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1464193783-5071-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-06-07 19:11:17 +02:00
Thor Thayer
abd56b3c84 Documentation: dt: socfpga: Add Altera Arria10 OCRAM binding 
Add the device tree bindings needed to support the Altera On-Chip
RAM ECC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1459450087-24792-5-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-04-02 13:49:07 +02:00
Thor Thayer
8b39ab7290 Documentation, dt, socfpga: Add Altera Arria10 L2 cache binding 
Add the device tree bindings needed to support the Altera L2 cache on
the Arria10 chip. Since all the peripherals share IRQs, the IRQ fields
are now in the ecc_manager.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1458576106-24505-7-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-03-29 10:30:07 +02:00
Thor Thayer
d31e2e846b ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries 
Add the device tree entries and bindings needed to support the Altera L2
cache and On-Chip RAM EDAC. This patch relies upon an earlier patch to
declare and setup On-chip RAM properly:

  8b907c8b62 ("arm: dts: socfpga: Add OCRAM node")

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: ijc+devicetree@hellion.org.uk
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-doc@vger.kernel.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: m.chehab@samsung.com
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/1455132384-17108-2-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2016-02-11 12:29:38 +01:00
Linus Torvalds
3d9f96d850 Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 
Pull ARM SoC DT updates from Kevin Hilman:
 "As usual, quite a few device-tree updates in ARM land.  There was one
  minor churn in DTs due to relicensing under a dual-license, and lots
  of little additions of new peripherals, features etc, but nothing
  really exciting to call to your attention.  Some higlights, focsuing
  on support for new SoCs and boards:

   - AT91: new boards: Overkiz,  Acme Systems' Arietta G25
   - tegra: HDA support
   - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
     RT-AC87U
   - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
     boards, DLink DNS-327L
   - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
     SL50
   - ARM: added support for Juno r1 board
   - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
     Mele A1000G
   - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
     Gateworks GW5510, and aristainetos2 boards
   - hisilicon: hi6220 SoC support; new boards: 96boards hikey"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
  ARM: hisi: revert changes from hisi/hip04-dt branch
  ARM: nomadik: set proper compatible for accelerometer
  ARM64: juno: add GPIO keys
  ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
  ARM: dts: Introduce STM32F429 MCU
  ARM: socfpga: dts: enable ethernet for Arria10 devkit
  ARM: dts: k2l: fix the netcp range size
  ARM: dts: k2e: fix the netcp range size
  ARM: dts: k2hk: fix the netcp range size
  ARM: dts: k2l-evm: Add device bindings for netcp driver
  ARM: dts: k2e-evm: Add device bindings for netcp driver
  ARM: dts: k2hk-evm: Add device bindings for netcp driver
  ARM: BCM5301X: Add DT for Asus RT-AC87U
  ARM: BCM5301X: add IRQ numbers for PCIe controller
  ARM: BCM5301X: add NAND flash chip description
  arm64: dts: Add dts files for Hisilicon Hi6220 SoC
  clk: hi6220: Document devicetree bindings for hi6220 clock
  arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
  ARM: at91/dt: sama5d4ek: mci0 uses slot 0
  ARM: at91/dt: kizbox: fix mismatch LED PWM device
  ...
 2015-06-26 11:43:59 -07:00
Thor Thayer
54b4a8f578 arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support 
Add support for the Arria10 SDRAM EDAC. Update the bindings document for
the new match string.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-5-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
 2015-06-24 18:16:10 +02:00
Alan Tull
4c060b89c1 ARM: socfpga: dts: add sdram controller dt binding doc 
Add binding doc for Altera SOCFPGA SDRAM controller.

Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
 2015-06-02 14:19:27 -05:00
Thor Thayer
75a41826e2 arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries. 
Add the Altera SDRAM EDAC bindings and device tree changes to the Altera SoC
project.

There was a discussion thread on whether this driver should be an mfd driver
or just make use of syscon, which is already a mfd. Ultimately, the
decision to use a simple syscon interface was reached.[1]

[1] https://lkml.org/lkml/2014/7/30/514

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
[dinguyen] cleaned-up commit header and remove version history.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
 2014-09-04 10:15:52 -05:00
Steffen Trumtrar
dd16fc4897 Documentation: dt: reset: move socfpga-reset 
Instead of having the documentation for the socfpga-reset controller in a
vendor specific directory, move it to the reset folder to all the other
reset drivers.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
 2014-05-05 22:33:17 -05:00
Steffen Trumtrar
75bb341908 Documentation: dt: socfpga: add reset-cells property 
To be able to use the reset-controller framework, the property
        #reset-cells
is mandatory.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
 2014-05-05 22:33:17 -05:00
Dinh Nguyen
042000b003 ARM: socfpga: Add clock entries into device tree 
Adds the main PLL clock groups for SOCFPGA into device tree file
so that the clock framework to query the clock and clock rates
appropriately.

$cat /sys/kernel/debug/clk/clk_summary
   clock                        enable_cnt  prepare_cnt  rate
---------------------------------------------------------------------
 osc1                           2           2            25000000
    sdram_pll                   0           0            400000000
       s2f_usr2_clk             0           0            66666666
       ddr_dq_clk               0           0            200000000
       ddr_2x_dqs_clk           0           0            400000000
       ddr_dqs_clk              0           0            200000000
    periph_pll                  2           2            500000000
       s2f_usr1_clk             0           0            50000000
       per_base_clk             4           4            100000000
       per_nand_mmc_clk         0           0            25000000
       per_qsi_clk              0           0            250000000
       emac1_clk                1           1            125000000
       emac0_clk                0           0            125000000
    main_pll                    1           1            1600000000
       cfg_s2f_usr0_clk         0           0            100000000
       main_nand_sdmmc_clk      0           0            100000000
       main_qspi_clk            0           0            400000000
       dbg_base_clk             0           0            400000000
       mainclk                  0           0            400000000
       mpuclk                   1           1            800000000
          smp_twd               1           1            200000000

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
 2013-04-14 20:17:59 -07:00
Dinh Nguyen
d6dd735f4b arm: socfpga: Add SMP support for actual socfpga harware 
Because the CPU1 start address is different for socfpga-vt and
socfpga-cyclone5, we add code to use the correct CPU1 start addr.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Pavel Machek <pavel@denx.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
 2013-02-11 19:37:26 -08:00
Dinh Nguyen
9c4566a117 ARM: socfpga: Enable SMP for socfpga 
Enable SMP for the SOCFPGA platform.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2012-10-26 14:59:39 +02:00