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3421 Commits

Author SHA1 Message Date
Huang Rui
9e2837f6ae drm/amdgpu/soc15: add psp ip block 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:21 -04:00
Huang Rui
c1798b5400 drm/amdgpu: register the psp v10 function pointers at psp sw_init 
Add the psp 10.0 callbacks for PSP.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:20 -04:00
Huang Rui
dfbd643861 drm/amdgpu: add psp v10 ip block 
Add the ip block version structure for psp 10.0.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:19 -04:00
Huang Rui
fd341dc590 drm/amdgpu: add psp v10 function callback for raven 
PSP is the security processor.  These are the support
functions.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:19 -04:00
Huang Rui
7fda6eca5d drm/amdgpu: add nbio MGCG for raven 
Add medium grained nbio clockgating implementation.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:18 -04:00
Chunming Zhou
aecbe64f2b drm/amdgpu: apply nbio7 for Raven (v3) 
nbio handles misc bus io operations. Handle
differences between different nbio bus versions.

v2: switch checks from RAVEN to APU (Alex)
    squash in raven rev id fetch
    squash in fix uninitalized hdp flush reg index for raven
v3: add some missed RAVEN to APU checks (Alex)

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:17 -04:00
Chunming Zhou
954d5d437f drm/amdgpu: add nbio7 support 
NBIO handles misc bus io functions on the chip.  This
helper lib has the apppropriate functions for NBIO 7.0.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:16 -04:00
Huang Rui
16f7bf0961 drm/amdgpu: enable sdma power gating for raven 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:15 -04:00
Huang Rui
13cfe5d076 drm/amdgpu/sdma4: add dynamic power gating for raven 
Add the functions to enable dynamic powergating.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:15 -04:00
Huang Rui
db3144029c drm/amdgpu: init sdma power gating for raven 
Initialize sdma for powergating.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:14 -04:00
Huang Rui
fe1a3b2e41 drm/amdgpu: enable sdma v4 MGCG and LS for raven 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:13 -04:00
Huang Rui
93e2b09357 drm/amdgpu: reuse sdma v4 MGCG and LS function for raven 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:12 -04:00
Chunming Zhou
7271f068d1 drm/amdgpu: add Raven sdma golden setting and chip id case 
Add golden settings for SDMA.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:11 -04:00
Huang Rui
c2cdb0ec01 drm/amdgpu: enable MC MGCG and LS for raven 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:11 -04:00
Huang Rui
2547a7aa3d drm/amdgpu: add raven clock gating and light sleep for mmhub 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:10 -04:00
Chunming Zhou
bc099ee974 drm/amdgpu/gmc9: change fb offset sequence so that used wider 
Initialize the values earlier.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:09 -04:00
Chunming Zhou
2d8e898e09 drm/amdgpu/gmc9: set mc vm fb offset for raven 
APU fb offset is set by sbios, which is different with DGPU.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:08 -04:00
Chunming Zhou
e4f3abaa97 drm/amdgpu: add raven case for gmc9 golden setting 
Golden settings for GMC9.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:07 -04:00
Hawking Zhang
18924c719e drm/amdgpu/gfx9: allow updating gfx mgpg state 
Wire up the functions to control medium grained
powergating.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:07 -04:00
Hawking Zhang
197f95c859 drm/amdgpu/gfx9: allow updating gfx cgpg state 
Wire up the enable functions to enable coarse
grained powegating.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:06 -04:00
Hawking Zhang
5897c99e5c drm/amdgpu/gfx9: allow updating sck slowdown and cp pg state 
More stuff for gfx pg.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:05 -04:00
Hawking Zhang
3a6cc4776d drm/amdgpu/gfx9: add enable/disable funcs for cp power gating 
Used to enable/disable cp powergating.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:04 -04:00
Hawking Zhang
ed5ad1e40e drm/amdgpu/gfx9: enable/disable sck slowdown thru rlc-smu handshake 
Required for proper powergating operation.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:03 -04:00
Hawking Zhang
91d3130a4d drm/amdgpu: init gfx power gating on raven 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:02 -04:00
Hawking Zhang
6bce466710 drm/amdgpu/gfx9: rlc save&restore list programming 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:02 -04:00
Hawking Zhang
c9719c69ac drm/amdgpu/gfx9: add rlc bo init/fini 
setup the save and restore buffers used for gfx
powergating.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:01 -04:00
Hawking Zhang
e999e6e945 drm/amdgpu: correct gfx9 csb size 
programming pa_sc_raster_config/config1 reg is removed from gfx9 csb

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:41:00 -04:00
Hawking Zhang
f9d1b81d57 drm/amdgpu/gfx9: enable cp interrupt for CGCG/CGLS/MGCG 
Required for proper handshaking between the GFX and RLC.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:59 -04:00
Hawking Zhang
a4d41ad0ef drm/amdgpu/gfx9: extend rlc fw setup 
Required for gfx powergating.

Change-Id: I5a2f8f41253686d8bb776a92aa68bf90877ebaa8
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:58 -04:00
Huang Rui
a4dc61f574 drm/amdgpu: add gfx clock gating for raven 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:58 -04:00
Chunming Zhou
5cf7433d99 drm/amdgpu/gfx9: add raven gfx config 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:57 -04:00
Chunming Zhou
eaa8572403 drm/amdgpu/gfx9: add chip name for raven when initializing microcode 
Fetch the correct ucode for raven.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:56 -04:00
Chunming Zhou
a5fdb3369a drm/amdgpu: add gc9.1 golden setting (v2) 
Add the GFX9 golden settings.

v2: squash in updates

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:55 -04:00
Chunming Zhou
060d124b06 drm/amdgpu: add module firmware for raven 
Fetch correct firmware for raven for gfx and sdma.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:54 -04:00
Chunming Zhou
4456ef4ea6 drm/amdgpu: add Raven chip id case for ucode 
Set the appropriate ucode loading mechanism.  Set to
direct for now.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:54 -04:00
Huang Rui
5c5928a238 drm/amdgpu: enable soc15 clock gating flags for raven 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:53 -04:00
Huang Rui
9e5a9eb4ff drm/amdgpu/soc15: add clock gating functions for raven 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:52 -04:00
Hawking Zhang
957c6fe188 drm/amd/amdgpu: fill in raven case in soc15 early init 
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:51 -04:00
Chunming Zhou
e0ab957868 drm/amdgpu/soc15: add Raven golden setting 
Add the common golden settings for Raven.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:50 -04:00
Chunming Zhou
1023b797d1 drm/amdgpu: add Raven ip blocks (v2) 
Add the IP blocks for RAVEN.

v2: drop DC for upstream (Alex)

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:50 -04:00
Chunming Zhou
2ca8a5d2eb drm/amdgpu: add RAVEN family id definition 
RAVEN is a new APU.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:49 -04:00
Alex Deucher
702f9292ad drm/amdgpu: add register headers for VCN 1.0 
Add registers for Video Controller Next 1.0

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:48 -04:00
Alex Deucher
bfd86c1ab3 drm/amdgpu: add register headers for THM 10.0 
Add registers for THerMal control 10.0

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:47 -04:00
Alex Deucher
ce869c637e drm/amdgpu: add register headers for SDMA 4.1 
Add registers for SDMA 4.1

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:46 -04:00
Alex Deucher
c4dc7b1a54 drm/amdgpu: add register headers for NBIO 7.0 
Add registers for NBIO 7.0

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:45 -04:00
Alex Deucher
cfeb9192fe drm/amdgpu: add register headers for MP 10.0 
Add registers for MP 10.0

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:44 -04:00
Alex Deucher
96ded7747c drm/amdgpu: add register headers for MMHUB 9.1 
Add registers for the MultiMedia Hub 9.1

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:44 -04:00
Alex Deucher
7582d7e649 drm/amdgpu: add register headers for GC 9.1 
Registers for Graphics Controller 9.1

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:43 -04:00
Alex Deucher
752ca077d5 drm/amdgpu: add register headers for DCN 1.0 
Registers for Display Controller Next 1.0

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:42 -04:00
Monk Liu
4f059ecdce drm/amdgpu:use job's list instead of check fence 
because if the fence is really signaled, it could already
released so the fence pointer is a wild pointer, but if
we use job->base.node we are safe because job will not
be released untill amdgpu_job_timedout finished.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-05-24 17:40:41 -04:00