3 Commits

Author	SHA1	Message	Date
Marc Zyngier	8f318526a2	irqchip/gic-v3: Add missing barrier to 32bit version of gic_read_iar() ... Commit 1a1ebd5 ("irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is visible on redestributor") fixed the missing barrier on arm64, but forgot to update the 32bit counterpart, which has the same requirements. Let's fix it. Fixes: 1a1ebd5 ("irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is visible on redestributor") Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>	2016-02-18 19:15:45 +00:00
Marc Zyngier	8e31ed9c18	irqchip/gic-v3: Add missing include for barrier.h ... Both the 32bit and 64bit versions of the GICv3 header file are using barriers, but neglect to include barrier.h, leading to an interesting splat in some circumstances. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1449483072-17694-3-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>	2015-12-10 19:13:26 +01:00
Jean-Philippe Brucker	d5cd50d318	ARM: add 32bit support to GICv3 ... Implement the system and memory-mapped register accesses in asm/arch_gicv3.h for 32bit architectures. This patch is a straightforward translation of the arm64 header. 64bit accesses are done in two times and don't need atomicity: TYPER is read-only, and the upper-word of IROUTER is always zero on 32bit architectures. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>	2015-10-09 23:11:55 +01:00