Commit Graph

104688 Commits

Author SHA1 Message Date
Russell King
c68b0274fb ARM: reduce "Booted secondary processor" message to debug level
Drop the "CPUn: Booted secondary processor" message from info to debug
level.  We later print how many CPUs came online, so listing each one
is redundant, and when using hotplug, can be quite noisy.

Tested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:55 +00:00
Russell King
8a2ab42b75 ARM: drop nwfpe initialisation message from warning to info level
nwfpe's initialisation message is not a warning, it is purely
informational.  Print it at the appropriate message level.

Tested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:54 +00:00
Russell King
108900b54d ARM: use pr_warn_ratelimited() when migrating IRQs
Rather than open coding the printk_ratelimit() check with pr_warn(), use
pr_warn_ratelimited() instead.

Tested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:51 +00:00
Russell King
4ed89f2228 ARM: convert printk(KERN_* to pr_*
Convert many (but not all) printk(KERN_* to pr_* to simplify the code.
We take the opportunity to join some printk lines together so we don't
split the message across several lines, and we also add a few levels
to some messages which were previously missing them.

Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:50 +00:00
Lin Yongting
c2459d35f5 ARM: 8204/1: Add unwinding support for memset function
The memset function never had unwinding annotations added.
Currently, when accessing NULL pointer by memset occurs the
backtrace shown will stop at memset or some completely unrelated
function. Add unwinding annotations in hopes of getting a more
useful backtrace when accessing NULL pointer by memset, kprobe
or interrupt.

Signed-off-by: Lin Yongting <linyongting@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:49 +00:00
Will Deacon
a391263cd8 ARM: 8203/1: mm: try to re-use old ASID assignments following a rollover
Rather than unconditionally allocating a fresh ASID to an mm from an
older generation, attempt to re-use the old assignment where possible.

This can bring performance benefits on systems where the ASID is used to
tag things other than the TLB (e.g. branch prediction resources).

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:46 +00:00
Stephen Boyd
2b94fe2ac9 ARM: 8215/1: vfp: Silence mvfr0 variable unused warning
Stephen Rothwell reports that commit 3f4c9f8f0a20 ("ARM: 8197/1:
vfp: Fix VFPv3 hwcap detection on CPUID based cpus") introduced a
variable unused warning.

arch/arm/vfp/vfpmodule.c: In function 'vfp_init':
arch/arm/vfp/vfpmodule.c:725:6: warning: unused variable 'mvfr0'
[-Wunused-variable]
  u32 mvfr0;

Silence this warning by using IS_ENABLED instead of ifdefs.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:44 +00:00
Stephen Boyd
6c96a4a6e2 ARM: 8197/1: vfp: Fix VFPv3 hwcap detection on CPUID based cpus
The subarchitecture field in the fpsid register is 7 bits wide on
ARM CPUs using the CPUID identification scheme, spanning bits 22
to 16. The topmost bit is used to designate that the
subarchitecture designer is not ARM when it is set to 1. On
non-CPUID scheme CPUs the subarchitecture field is only 4 bits
wide and the higher bits are used to indicate no double precision
support (bit 20) and the FTSMX/FLDMX format (bits 21-22).

The VFP support code only looks at bits 19-16 to determine the
VFP version. On Qualcomm's processors (Krait and Scorpion) we
should see that we have HWCAP_VFPv3 but we don't because bit 22
is set to 1 to indicate that the subarchitecture is not
implemented by ARM and the rest of the bits are left as 0 because
this is the first subarchitecture that Qualcomm has designed.
Unfortunately we can't just widen the FPSID subarchitecture
bitmask to consider all the bits on a CPUID scheme because there
may be CPUs without the CPUID scheme that have VFP without double
precision support and then the version would be a very wrong and
large number. Instead, update the version detection logic to
consider if the CPU is using the CPUID scheme.

If the CPU is using CPUID scheme, use the MVFR registers to
determine what version of VFP is supported. We already do this
for VFPv4, so do something similar for VFPv3 and look for single
or double precision support in MVFR0. Otherwise fall back to
using FPSID to detect VFP support on non-CPUID scheme CPUs. We
know that VFPv3 is only present in CPUs that have support for the
CPUID scheme so this should be equivalent.

Tested-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:43 +00:00
Stephen Boyd
6f0f2a9f0f ARM: 8196/1: vfp: Workaround bad MVFR1 register on some Kraits
Certain versions of the Krait processor don't report that they
support the fused multiply accumulate instruction via the MVFR1
register despite the fact that they actually do. Unfortunately we
use this register to identify support for VFPv4. Override the
hwcap on all Krait processors to indicate support for VFPv4 to
workaround this.

Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-11-21 15:24:41 +00:00
Will Deacon
7f73f7aef8 arm64: mm: report unhandled level-0 translation faults correctly
Translation faults that occur due to the input address being outside
of the address range mapped by the relevant base register are reported
as level 0 faults in ESR.DFSC.

If the faulting access cannot be resolved by the kernel (e.g. because
it is not mapped by a vma), then we report "input address range fault"
on the console. This was fine until we added support for 48-bit VAs,
which actually place PGDs at level 0 and can trigger faults for invalid
addresses that are within the range of the page tables.

This patch changes the string to report "level 0 translation fault",
which is far less confusing.

Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-11-21 14:22:22 +00:00
Javier Martinez Canillas
c645a598f9 ARM: EXYNOS: Call regulator core suspend prepare and finish functions
The regulator framework has a set of helpers functions to be used when
the system is entering and leaving from suspend but these are not called
on Exynos platforms. This means that the .set_suspend_* function handlers
defined by regulator drivers are not called when the system is suspended.

Suggested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-21 22:49:47 +09:00
Abhilash Kesavan
adc548d77c ARM: EXYNOS: Use MCPM call-backs to support S2R on exynos5420
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address setup code post-resume.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-21 22:49:46 +09:00
Vikas Sajjan
0fdf088fd8 ARM: EXYNOS: Add Suspend-to-RAM support for exynos5420
Adds Suspend-to-RAM support for EXYNOS5420

Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-21 22:49:46 +09:00
Abhilash Kesavan
af2e0a0754 ARM: EXYNOS: Add PMU support for exynos5420
Adds initial PMU settings for exynos5420. This is required for
future S2R and Switching support.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-21 22:49:45 +09:00
Pankaj Dubey
6b7bfd8292 ARM: EXYNOS: Move PMU specific definitions from common.h
This patch moves PMU specific definitions into a new file
as exynos-pmu.h.
This will help in reducing dependency of common.h in pmu.c.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-21 22:49:44 +09:00
Pankaj Dubey
14fc8b93d4 ARM: EXYNOS: Add platform driver support for Exynos PMU
This patch modifies Exynos Power Management Unit (PMU) initialization
implementation in following way:

- Added platform driver support for Exynos PMU IP.
- Added platform struct exynos_pmu_data to hold platform specific data.
- For each SoC's PMU support now we can add platform data and statically
  bind PMU configuration and SoC specific initialization function.
- Separate each SoC's PMU initialization function and make it as part of
  platform data.
- It also removes uses of soc_is_exynosXYZ().

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-21 22:49:44 +09:00
Chanwoo Choi
c0adae9e51 ARM: EXYNOS: Add support for exynos4415 SoC
This patch adds support for Exynos4415 SoC. Exynos4415 is based on
the 32-bit RISC processor for Smartphone. Exynos4415 has Cortex A9
quad-cores and has a target speed of 1.6GHz and provides 8.5GB/s
memory bandwidth.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-21 22:49:43 +09:00
Kukjin Kim
b5d841a2bf Merge branch 'v3.19-next/non-critical-fixes' into v3.19-next/mach-exynos 2014-11-21 22:49:27 +09:00
Javier Martinez Canillas
0788148935 ARM: exynos_defconfig: Enable max77802 rtc and clock drivers
Commit 6e80e3d875 ("ARM: exynos_defconfig: Enable MAX77802")
enabled support for the max77802 regulators but the PMIC also
has a Real-Time-Clock (RTC) and 2-channel 32kHz clock outputs.

Enable the kernel config options to have the drivers for these
devices built-in since they are present in many Exynos boards.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-11-21 21:46:21 +09:00
Kukjin Kim
68847edc83 Merge branch 'v3.19-next/cleanup-samsung' into v3.19-next/mach-exynos 2014-11-21 21:40:23 +09:00
Arnd Bergmann
d1940cbd46 Merge tag 'socfpga_dts_updates_for_v3.19' of git://git.rocketboards.org/linux-socfpga-next into next/dt
Pull "SoCFPGA DTS updates for v3.19" from Dinh Nguyen:

- Add DTS support for a new chip in the SOCFPGA family, the Arria 10.
- Enable watchdog node.
- Add SPI nodes.
- Add the OCRAM node.

* tag 'socfpga_dts_updates_for_v3.19' of git://git.rocketboards.org/linux-socfpga-next:
  arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC
  arm: dts: socfpga: enable watchdog for socfpga platform
  arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.
  arm: dts: socfpga: Add OCRAM node

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 13:31:06 +01:00
Arnd Bergmann
3c6f4b154a Merge tag 'renesas-soc-cleanups2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
Pull "Second Round of Renesas ARM Based SoC Cleanups for v3.19" from Simon Horman:

* Spelling and grammar fixes

* tag 'renesas-soc-cleanups2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7779: Spelling/grammar s/entity/identity/, s/map/mapping/
  ARM: shmobile: sh7372: Spelling/grammar s/entity map/identity mapping/
  ARM: shmobile: sh73a0: Spelling/grammar s/entity map/identity mapping/

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 13:05:26 +01:00
Arnd Bergmann
6febbf472b Merge tag 'renesas-soc4-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Fourth Round of Renesas ARM Based SoC Updates for v3.19" from Simon Horman:

* Add early debugging support using SCIF(A)

* tag 'renesas-soc4-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Add early debugging support using SCIF(A)

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 13:04:06 +01:00
Arnd Bergmann
5ba3c24ca0 Merge tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:

* Add labels for LEDs on kzm9g-reference and koelsch
* Add Sound support to r8a7790/lager and r8a7791/koelsch
* Add IIC DMA nodes to r8a7790 and r8a7791
* Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
* Add SGX, MMP and VSP1 clocks to r8a7794
* Add USBDMAC{0,1} clocks to r8a7790 and r8a7791

* tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
  ARM: shmobile: r8a7791: add USBDMAC{0,1} clocks to device tree
  ARM: shmobile: r8a7790: add USBDMAC{0,1} clocks to device tree
  ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree
  ARM: shmobile: r8a7794: Add SGX clock to device tree
  ARM: shmobile: koelsch: add Volume Ramp usage on comment
  ARM: shmobile: lager: add Volume Ramp usage on comment
  ARM: shmobile: r8a7791: add DMA nodes for IIC
  ARM: shmobile: r8a7790: add DMA nodes for IIC
  ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs
  ARM: shmobile: koelsch dts: Add labels for the LEDs
  ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties
  ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible properties
  ARM: shmobile: koelsch: Sound DMA support via DVC on DTS
  ARM: shmobile: koelsch: Sound DMA support via SRC on DTS
  ARM: shmobile: koelsch: Sound DMA support via BUSIF on DTS
  ARM: shmobile: koelsch: Sound DMA support on DTS
  ARM: shmobile: koelsch: Sound PIO support on DTS
  ARM: shmobile: koelsch: fixup I2C2 clock frequency
  ARM: shmobile: lager: Sound DMA support via DVC on DTS
  ARM: shmobile: lager: Sound DMA support via SRC on DTS
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 13:02:08 +01:00
Arnd Bergmann
00f879bed4 Merge tag 'berlin-soc-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc
Pull "Berlin SoC changes for v3.19 (round 2)" from Sebastian Hesselbarth:

- Do not select RESET_CONTROLLER as it is user selectable

* tag 'berlin-soc-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin:
  ARM: berlin: do not select RESET_CONTROLLER

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 12:59:18 +01:00
Arnd Bergmann
1bc7f27dee Merge tag 'berlin-dt-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Pull "Berlin DT changes for v3.19 (round 2)" from Sebastian Hesselbarth:

- AHCI and SATA PHY nodes for BG2
- USB and USB PHZ nodes for BG2/BG2CD/BG2Q

* tag 'berlin-dt-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin:
  ARM: dts: berlin: enable USB on the Google Chromecast
  ARM: dts: berlin: add BG2CD nodes for USB support
  ARM: dts: Berlin: enable USB on the BG2Q DMP
  ARM: dts: berlin: add BG2Q nodes for USB support
  ARM: berlin: Enable SATA on Sony NSZ-GS7
  ARM: berlin: Add AHCI and SATA PHY nodes to BG2

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 12:57:30 +01:00
Hauke Mehrtens
140bd60383 ARM: BCM5301X: fix early serial console
This device actually has a 8250 serial with a shift of 0.
Tested this on a BCM4708.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 12:34:54 +01:00
Arnd Bergmann
a850c42702 ARM: common: edma: edma_pm_resume may be unused
The recently introduced resume hook in the edma driver
is not referenced when CONFIG_PM_SLEEP is not set, which
results in a compile warning in keystone builds.

This adds an appropriate #ifdef.

Cc: Nishanth Menon <nm@ti.com>
Cc: Daniel Mack <zonque@gmail.com>
Cc: Joel Fernandes <joelf@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Fixes: a2b1175131: ("ARM: common: edma: add suspend resume hook")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 12:31:52 +01:00
Nicolas Ferre
2e591e7b3a ARM: at91: remove at91sam9261/at91sam9g10 legacy board support
Remove legacy support for at91sam9261/at91sam9g10 boards.
This include board files removal plus all legacy code for non DT boards
support.
Use the Device Tree for running this board with newer kernels.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-11-21 12:09:27 +01:00
Thierry Reding
fd1b0f5b62 ARM: tegra: Regenerate default configuration
This patch was generated by running 'make tegra_defconfig' followed by
'make savedefconfig' with the v3.18-rc1 tag checked out. Two values go
away: CONFIG_SCSI is selected by CONFIG_ATA and CONFIG_SCSI_MULTI_LUN
was removed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-21 10:50:38 +01:00
Heiko Carstens
e56da345eb s390/traps: die on translation exceptions
Translation exceptions should never happen, since that implies that
either we screwed up the page tables or missed to properly flush the TLB.

In both cases we should not just simply kill user space or walk the kernel
exception tables. Instead an oops or a panic (panic_on_oops) is the better
answer.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-11-21 08:49:33 +01:00
Heiko Carstens
413d404768 s390/traps: print interrupt code and instruction length code
It always confuses me to see the mixed instruction length code and
interruption code on user space faults, while the message clearly
says it is the interruption code.
So split the value and print both values separately. Also add the ILC
output to the die() message, so thar user and kernel space faults
contain the same information.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-11-21 08:49:30 +01:00
Dinh Nguyen
475dc86d08 arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC
The Arria 10 is latest SOC+FPGA from the Altera SOCFPGA platform. The Arria10
SOC shares some similarities with the SOCFPGA Cyclone5 and Arria5, but there
are enough differences to warrant a new base dtsi.

The differences are:
* 3 EMAC controllers
* 5 I2C controllers
* 3 SPI controllers
* 1.5 GHZ dual A9s
* Support for DDR4

Besides the usual memory map and IRQ changes, the clock framework will be
different, so this patch just adds the fixed-clocks.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-11-20 23:08:42 -06:00
Dinh Nguyen
c1ad85d772 arm: dts: socfpga: enable watchdog for socfpga platform
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-11-20 23:08:39 -06:00
Thor Thayer
ba6b96b3e9 arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.
Add 2 SPI nodes to SOCFPGA device tree.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-11-20 23:08:36 -06:00
Dinh Nguyen
8b907c8b62 arm: dts: socfpga: Add OCRAM node
Add a 64KB ocram node for SOCFPGA.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-11-20 23:08:32 -06:00
Andy Lutomirski
b5e212a305 x86, syscall: Fix _TIF_NOHZ handling in syscall_trace_enter_phase1
TIF_NOHZ is 19 (i.e. _TIF_SYSCALL_TRACE | _TIF_NOTIFY_RESUME |
_TIF_SINGLESTEP), not (1<<19).

This code is involved in Dave's trinity lockup, but I don't see why
it would cause any of the problems he's seeing, except inadvertently
by causing a different path through entry_64.S's syscall handling.

Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Dave Jones <davej@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/a6cd3b60a3f53afb6e1c8081b0ec30ff19003dd7.1416434075.git.luto@amacapital.net
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-11-20 23:01:53 +01:00
Tony Lindgren
e639cd5bfc ARM: OMAP2+: Prepare to move GPMC to drivers by platform data header
We still need to support platform data for omap3 until it's booting
in device tree only mode. So let's add platform_data/omap-gpmc.h for
that, and a minimal linux/omap-gpmc.h for the save and restore used
by the PM code.

Let's also keep a minimal mach-omap2/gpmc.h still around to avoid
churn on the board-*.c files. Once omap3 boots in device tree only
mode, we can drop mach-omap2/gpmc.h and we can make the data
structures in platform_data/omap-gpmc.h private to the GPMC driver.

Note that we can now also remove gpmc-nand.h and gpmc-onenand.h.

Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-20 12:11:25 -08:00
Arnd Bergmann
594b5d51c6 Merge tag 'omap-for-v3.19/cleanup-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/omap-gpmc
Pull "omap clean-up for v3.19" from Tony Lindgren:

Drop few unused omap board files. The support for ti81xx is known to
be incomplete and broken, and the 3430sdp is only used in few automated
boot test systems AFAIK and those have been booting in device tree only
mode for quite some time now.

Note that this branch has a dependency to the related device tree
changes and GPMC changes sent in a separate pull request.

* tag 'omap-for-v3.19/cleanup-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Drop board file for 3430sdp
  ARM: OMAP2+: Drop board file for ti8168evm

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 18:15:47 +01:00
Arnd Bergmann
594b732110 Merge tag 'omap-for-v3.19/gpmc-timings' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/omap-gpmc
Pull "omap gpmc changes for v3.19" from Tony Lindgren:

GPMC (General Purpose Memory Controller) changes for omaps. These
changes allow us to drop dependencies to bootloader timings now
that the known device tree entries have been fixed. So we can now
require proper timings to be configured and get rid of the legacy
smsc91x code.

Note that this branch has a dependency to the related device tree
branch sent in a separate pull request as timings are now required.

* tag 'omap-for-v3.19/gpmc-timings' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Remove unnecesary include in GPMC driver
  ARM: OMAP2+: Drop legacy code for gpmc-smc91x.c
  ARM: OMAP2+: Require proper GPMC timings for devices
  ARM: OMAP2+: Show bootloader GPMC timings to allow configuring the .dts file
  ARM: OMAP2+: Fix support for multiple devices on a GPMC chip select
  ARM: OMAP2+: gpmc: Sanity check GPMC fck on probe
  ARM: OMAP2+: gpmc: Keep Chip Select disabled while configuring it
  ARM: OMAP2+: gpmc: Always enable A26-A11 for non NAND devices
  ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child()
  ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 18:14:47 +01:00
Arnd Bergmann
0233903e40 Merge branch 'omap/dt' into next/omap-gpmc
Dependency for the gpmc changes

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 18:14:15 +01:00
Arnd Bergmann
58a9e8f8fe Merge tag 'davinci-for-v3.19/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/cleanup
Pull "DaVinci updates for v3.19 - cleanups" from Sekhar Nori:

Fix some non-standard logging styles and remove
some unnecessary typecasting.

* tag 'davinci-for-v3.19/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: Remove redundant casts
  ARM: davinci: Use standard logging styles

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 18:00:14 +01:00
Arnd Bergmann
a6f5e6bdc2 Merge tag 'davinci-for-v3.19/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers
Pull "Adds suspend/resume support to EDMA driver" from Sekhar Nori:

* tag 'davinci-for-v3.19/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: common: edma: add suspend resume hook

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 17:55:58 +01:00
Liviu Dudau
71f867ec13 arm64: Add Juno board device tree.
This adds support for ARM's Juno development board (rev 0).
It enables most of the board peripherals: UART, I2C, USB, MMC and
100Mb ethernet. There is no support at the moment for clock setting
and HDLCD driver which depends on it.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 17:53:30 +01:00
Will Deacon
1b907f46db arm64: kconfig: move emulation option under kernel features
Having the instruction emulation submenu underneath "platform selection"
is a great way to hide options we don't want people to use, but somewhat
confusing when you stumble across it there.

Move the menuconfig option underneath "kernel features", where it makes
a bit more sense.

Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-11-20 16:51:10 +00:00
Liviu Dudau
e9d4ac655b arm64: Create link to include/dt-bindings to enable C preprocessor use.
DT files used in the compilation phase can be preprocessed by the C
preprocessor. This requires an include/dt-bindings directory to be
present in the arch/arm64/boot/dts directory.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 17:51:09 +01:00
Arnd Bergmann
8c123c9417 Merge branch 'cleanup/dts-subdirs' into next/arm64
Dependency for Juno support, from cleanup branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 17:50:37 +01:00
Arnd Bergmann
d4aaef6199 Merge tag 'sti-defconfig-for-v3.19-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/defconfig
Pull "STi defconfig updates for v3.19" from Maxime Coquelin:

Highlights:
-----------
 - Enable ST EHCI and OHCI USB drivers
 - Enable STiH416 and STiH415 USB2 PHY driver

* tag 'sti-defconfig-for-v3.19-1' of git://git.stlinux.com/devel/kernel/linux-sti:
  ARM: multi_v7_defconfig: Enable stih415/6 usb2 phy driver.
  ARM: multi_v7_defconfig: Enable st ohci and ehci HCD drivers.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 17:45:43 +01:00
Masami Hiramatsu
a017784f1b kprobes/ftrace: Recover original IP if pre_handler doesn't change it
Recover original IP register if the pre_handler doesn't change it.
Since current kprobes doesn't expect that another ftrace handler
may change regs->ip, it sets kprobe.addr + MCOUNT_INSN_SIZE to
regs->ip and returns to ftrace.
This seems wrong behavior since kprobes can recover regs->ip
and safely pass it to another handler.

This adds code which recovers original regs->ip passed from
ftrace right before returning to ftrace, so that another ftrace
user can change regs->ip.

Link: http://lkml.kernel.org/r/20141009130106.4698.26362.stgit@kbuild-f20.novalocal

Signed-off-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2014-11-20 11:42:48 -05:00
Arnd Bergmann
2dfb8bf3be Merge tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "ARM: rockchip: second batch of dts related changes" from Heiko Stuebner:

- the dts part of the rk3288 smp support
- rate init for rk3288 clocks
- enablement of various peripherals
- new boardfile for Haoyu Marsboard (rk3066 based)

* tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: enable PWM on Radxa Rock
  ARM: dts: rockchip: fix invalid unit-address in rk3188.dtsi
  ARM: dts: rk3288: add VOP iommu nodes
  ARM: dts: rockchip: add reset for CPU nodes
  ARM: dts: rockchip: add intmem node for rk3288 smp support
  ARM: dts: rockchip: add pmu references to cpus nodes
  ARM: dts: rockchip: add serial aliases for rk3066 and rk3188
  ARM: dts: rockchip: Add devicetree source for MarsBoard RK3066
  ARM: dts: rockchip: Add EMAC Rockchip for RK3066 SoCs

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 17:42:17 +01:00