Ralf Baechle
f4cdb6a00c
MIPS: SEAD3: Enable LL/SC.
...
All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
2013-03-12 18:58:09 +01:00
Paul Bolle
631b0af98c
MIPS: Get rid of CONFIG_CPU_HAS_LLSC again
...
Commit f7ade3c168
("MIPS: Get rid of
CONFIG_CPU_HAS_LLSC") did what it promised to do. But since then that
macro and its Kconfig symbol popped up again. Get rid of those again.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl >
Cc: Jonas Gorski <jogo@openwrt.org >
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/4978/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
2013-03-12 18:58:02 +01:00
Ralf Baechle
7034228792
MIPS: Whitespace cleanup.
...
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org >
2013-02-01 10:00:22 +01:00
Steven J. Hill
3070033a16
MIPS: Add core files for MIPS SEAD-3 development platform.
...
More information about the SEAD-3 platform can be found at
<http://www.mips.com/products/development-kits/mips-sead-3/ >
on MTI's site. Currently, the M14K family of cores is what
the SEAD-3 is utilised with.
Signed-off-by: Douglas Leung <douglas@mips.com >
Signed-off-by: Chris Dearman <chris@mips.com >
Signed-off-by: Steven J. Hill <sjhill@mips.com >
2012-09-13 15:43:46 -05:00