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9438 Commits

Author SHA1 Message Date
Zeyu Fan
3639fa6812 drm/amd/display: Clean up some DCN1 guards 
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:43 -04:00
Yue Hin Lau
f4d5abf56b drm/amd/display: move ocsc programming from opp to dpp 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:42 -04:00
Roman Li
48841a20fc drm/amd/display: Fix eDP panel light-up 
Power-down panel on disale only if sink exists
 otherwise it fails edid read during init sequence

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:42 -04:00
Andrey Grodzovsky
4017fcdf58 drm/amd/display: Use stream validation hook. 
Use dc_validate_stream from crtc atomic_check for single stream
validation.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:41 -04:00
Andrey Grodzovsky
9345d9874c drm/amd/display: Move stream validations into seperate function. 
Stateless streams validations (not require resource population)
moved into hook to be called directly from DM.

Call dc_validate_stream be before validate_with_context for
non Linux APIs

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:40 -04:00
Eric Yang
6be425f3dc drm/amd/display: break up plane disable and disconnect in set mode 
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:40 -04:00
Tony Cheng
a74b27341e drm/amd/display: separate plane disable sequence 
- disconnect:  trigger hw to disconnect plane on next vsync
- disable: disables HW block and disable clocks
- power_down: kill power

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:39 -04:00
Charlene Liu
ee356d8f4f drm/amd/display: single PSR display not allow CSTATE sw w/a 
Description:
HW issue when all the pipes are off, DCE_allow_cstate is 0.
New sequence : blank OTG only instead of previous OTG_master_en=0)

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:39 -04:00
Harry Wentland
7a6c4af6bf drm/amd/display: Roll core_gamma into dc_gamma 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:38 -04:00
Harry Wentland
0b0aab86d5 drm/amd/display: Roll gamma struct into core_gamma 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:37 -04:00
Harry Wentland
b73a22d325 drm/amd/display: Roll core_sink into dc_sink 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:37 -04:00
Harry Wentland
8989903935 drm/amd/display: Roll sink struct into core_sink 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:36 -04:00
Harry Wentland
d0778ebfd5 drm/amd/display: Roll core_link into dc_link 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:36 -04:00
Harry Wentland
e12cfcb1d4 drm/amd/display: Roll core_surface into dc_surface 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:35 -04:00
Zeyu Fan
08b1688620 drm/amd/display: Move DCHUBBUB block from MemInput to HW sequencer. 
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:34 -04:00
Yue Hin Lau
c8d7bd8bd0 drm/amd/display: move RGAM programming from opp to dpp 
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:34 -04:00
Charlene Liu
e63825be73 drm/amd/display: fix YCbCr420 deep color mode not supported 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:33 -04:00
Eric Yang
b6762f0c16 drm/amd/display: add missing func for dce11o to avoid crash 
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:32 -04:00
Tony Cheng
7db90a6b58 drm/amd/display: move ocsc programming from opp to dpp 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yuehin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:32 -04:00
Eric Yang
8748068764 drm/amd/display: add idle wait for passive surface update and modeset 
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:31 -04:00
Eric Yang
755d3bcfd4 drm/amd/display: Fix generic_reg_wait 1000ms case 
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:31 -04:00
Tony Cheng
0a87425a37 drm/amd/display: move VGA to HWSS from TG 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:30 -04:00
Ding Wang
8c4abe0b07 drm/amd/display: fix decide_link_settings 
Signed-off-by: Ding Wang <Ding.Wang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:29 -04:00
Harry Wentland
03618e9107 drm/amd/display: Roll surface struct into core_surface 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:29 -04:00
Dmytro Laktyushkin
516666318f drm/amd/display: support for updated register headers on DCN 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:28 -04:00
Wesley Chalmers
f811fd5a66 drm/amd/display: Change DTN_INFO macro 
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:28 -04:00
Zeyu Fan
50e27654d7 drm/amd/display: Implement logic for hdmi info packet bits. 
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:27 -04:00
Dmytro Laktyushkin
98e4a22f02 drm/amd/display: revert dcn10 soc defaults to 17 19 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:26 -04:00
Eric Yang
aa9850705f drm/amd/display: fix locking in apply_ctx_for_surface 
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:26 -04:00
Tony Cheng
7f10f3c2a7 drm/amd/display: mpcc disconnect and pipe pg in multi-display 
still quite hacky.  but this address not properly shutdown pipe video underlay
+ enable another display case, as well as mode changes with video overlay.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:25 -04:00
Dmytro Laktyushkin
9b1c9b4c2e drm/amd/display: update dcn register headers 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:25 -04:00
Tony Cheng
2b13d7d380 drm/amd/display: mpo debug sanity checks 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:24 -04:00
Tony Cheng
6d244be884 drm/amd/display: plumbing to allow easy print of HW state for DTN 
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:23 -04:00
Tony Cheng
fc0956909f drm/amd/display: register programming consolidation 
remove redundant DPP_CLOCK_ENABLE in ipp. clock programmed by HWSS

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:23 -04:00
Roman Li
72f0281d34 drm/amd/display: fix index and union overwrite in compressor 
Fixing 2 bugs in compressor:
- array out of bounds due to incorrect index
- compressor options always 0 due to union overwrite

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:22 -04:00
Wenjing Liu
8ee65d7c93 drm/amd/display: Return hpd_irq_dpcd from hpd_rx handler 
Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:22 -04:00
Zeyu Fan
3d696cbfd4 drm/amd/display: Set i2c speed to 100khz for DCE11.2 and later. 
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:21 -04:00
Dmytro Laktyushkin
6631e5a911 drm/amd/display: fix dcn10_resource read_dce_straps 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:20 -04:00
Harry Wentland
20e9b0718b drm/amd: Add missing SURFACE_TMZ register shift/mask 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:20 -04:00
Harry Wentland
ee87a45e95 drm/amd/include: Add DCHUBBUB_TEST_DEBUG register defines 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:19 -04:00
Harry Wentland
d8bad05a62 drm/amd/include: Add DC_PINSTRAPS.AUDIO defines 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:18 -04:00
Leo (Sunpeng) Li
eb78d83e06 drm/amd/display: Do not release state objects on atomic check fail 
In any drm ioctl call, drm_atomic_state_clear() is called at the end to
destroy the states; even if atomic check fails. Therefore, releasing
states on atomic check failure is incorrect.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:18 -04:00
Eric Yang
4bdbab3efd drm/amd/display: powergate fe of reused pipes to reset ttu 
When we exit MPO, disconnected pipes cannot be immediately powergated
because registers are double buffered, and actual disconnection does
not happen until VUPDATE. So it is differred for many flips.
However in the case of exiting full screen, the transition from MPO
to grph only back to MPO is very fast and also involves increasing of
watermarks. Since the underlay pipe is never powergated in this
scenario, it keeps its old TTU counter, which causes allowPstateSwitch
signal to be de-asserted when compared to the new increased watermark.
Since the new pipe is not enabled yet, the signal will be continously
de-asserted and hangs SMU, who's waiting for the signal to do pstate
switching.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:17 -04:00
Anthony Koo
2233ec72b3 drm/amd/display: Add regkey for DRR control for internal panel 
Also need to change default to off

Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:16 -04:00
Tony Cheng
d65359d571 drm/amd/display: revert order change of HUBP and MPC disable 
- root cause was we disable opp clk in MPC disconnect
- hubp_blank is not double buffered, so we can't blank until MPC disconnect or we have risk of underflow

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:16 -04:00
Charlene Liu
15e173352e drm/amd/display: fix aviInfoFrame bar Info and add set_avMute 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:15 -04:00
Eric Yang
1674d35bf5 drm/amd/display: properly turn off unused mpc before front end programming 
MPCC_OPP_ID must be programmed to 0xf to properly turn off the mpcc.
However the software state of the mpcc must keep track of the opp that
the mpcc is attached to for reset to properly happen. This is kinda
hacky right now, but a good solution may involve a lot of work.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:14 -04:00
Charlene Liu
8357234009 drm/amd/display: fix DVI connected to HDMI connector max tmds clock 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:14 -04:00
Ding Wang
820e393548 drm/amd/display: link training fallback actions 
Signed-off-by: Ding Wang <ding.wang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:13 -04:00
Andrey Grodzovsky
9011443477 drm/amd/display: Fix S3 gamma corruption. 
On S3 resume gamma is corrupted since no gamma programming
took place.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:13 -04:00