ARMv7 hardware (S5Pv210 and Exynos SoCs) provides only 32 external
interrupts which can wakeup device from deep sleep modes. On S5Pv210
these are gph0-gph3. On all ARMv7 Exynos designs these are gpx0-gpx3.
There is only one 32-bit register for controlling the external wakeup
interrupt mask (masking and unmasking waking capability of these
interrupts).
This lead to implementation in pinctrl driver and machine code which was
using static memory for storing the mask value and not caring about
multiple devices of pin controller... because only one pin controller
device will be handling this.
Since each pin controller node in Device Tree maps onto one device, this
corresponds to hidden assumption in parsing the Device Tree: external
wakeup interrupts can be defined only once. Make this assumption an
explicit requirement.
ARMv8 Exynos5433 and Exynos7 bring additional 32 external wakeup
interrupts (up to 64 total, banks gpa0-gpa3 and gpf1-gpf5) and another
32-bit wide register for controlling them. Existing code does not
support it but anyway these additional interrupts will be belonging to
the same pin controller device/node.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Sylwester Nawrocki <snawrocki@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Optionally obtain a lcd-supply regulator during probe and use it in
__pxafb_lcd_power() to switch the power supply of LCD panels.
This helps boards booted from DT to control such voltages without
callbacks.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Reviewed-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
The Exynos5440 is not actively developed, there are no development
boards available and probably there are no real products with it.
Remove wide-tree support for Exynos5440.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Sylwester Nawrocki <snawrocki@kernel.org>
Added support for the CPCAP power management regulator functions on
Tegra based Motorola Xoom devices.
Added sw2_sw4 value tables, which provide power to the Tegra core and
aux devices.
Added the Xoom init tables and device tree compatibility match.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Ben writes:
This adds support for offloading the FSI low level bitbanging to the
ColdFire coprocessor of the Aspeed SoCs. All the pre-requisites have
already been merged, this is the final piece in the puzzle.
This branch also pull gpio/ib-aspeed which is a topic branch already
in gpio/for-next (and thus in next) whic contains pre-requisites.
Finally, there's also a bug fix to the sbefifo driver for some
inconsistent use of a mutex in the error handling code.
Add "rockchip,px30-i2s", "rockchip,rk3066-i2s" for i2s on px30 platform.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liang Chen <cl@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This binding is used to keep the backward compatibility with the current
dtb's [1]. The binding informs the driver that the unused switch regulators
can be disabled.
If it is not specified, the driver doesn't disable the switch regulators.
[1] https://patchwork.kernel.org/patch/10490381/
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Amlogic Meson SAR ADC implementation on the Meson8m2 SoC is
identical to the Meson8b variant. Add a compatible string to indicate
that we support the SAR ADC on the Meson8m2 SoC.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Device tree compiler gives a warning if a device node has "@"
but no reg property.
Fix the example in iio: adc: sigma-delta-modulator.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This represents a physical chip in the system and allows
a stable numbering scheme to be passed to udev for userspace
to recognize which chip is which.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Rob Herring <robh@kernel.org>
This isn't per-se a real device, it's a pseudo-device that
represents the use of the Aspeed built-in ColdFire to
implement the FSI protocol by bitbanging the GPIOs instead
of doing it from the ARM core.
Thus it's a drop-in replacement for the existing
fsi-master-gpio pseudo-device for use on systems based
on the Aspeed chips. It has most of the same properties,
plus some more needed to operate the coprocessor.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Rob Herring <robh@kernel.org>
TI AM654 support for v4.19 merge window
This branch adds initial support for new Texas Instruments AM654
quad core A53 ARMv8 SoC. It's the first device for TI K3 multicore SoC
architecture.
Initially only basic devices are configured, support for more devices
will follow later on. And many of the internal devices familiar from
earlier TI SoCs should work with existing kernel device drivers.
* tag 'am654-for-v4.19-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm64: dts: ti: Add support for AM654 EVM base board
soc: ti: Add Support for AM654 SoC config option
arm64: dts: ti: Add Support for AM654 SoC
arm64: Add support for TI's K3 Multicore SoC architecture
dt-bindings: arm: ti: Add bindings for AM654 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
Reset controller changes for v4.19
This adds new drivers and bindings for the SDM845 AOSS (always on
subsystem) reset controller and for the Uniphier USB3 core reset.
SPI controller resets are added to the Uniphier reset driver.
* tag 'reset-for-4.19' of git://git.pengutronix.de/git/pza/linux:
reset: uniphier: add reset control support for SPI
reset: uniphier: add USB3 core reset control
dt-bindings: reset: uniphier: add USB3 core reset support
reset: simple: export reset_simple_ops to be referred from modules
reset: qcom: AOSS (always on subsystem) reset controller
dt-bindings: reset: Add AOSS reset bindings for SDM845 SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
i.MX device tree update for 4.19:
- Add device tree support for i.MX6SLL SoC.
- New board support: ConnectCore 6UL System-On-Module and SBC Express;
ZII SCU2 Mezz, SCU3 ESB, SSMB SPU3 and CFU1 board; i.MX6SLL EVK
board; Engicam i.CoreM6 1.5 Quad/Dual MIPI; LogicPD MX31Lite board;
i.MX53 HSC/DDC boards from K+P.
- Remove fake regulator bus container node and enable USB OTG support
for i.MX6 wandboard and riotboard.
- Populate RAVE SP EEPROM, backlight, power button and watchdog devices
for ZII boards.
- Add cooling-cells for cpufreq cooling device, and add OPP properties
for all CPUs.
- A series from Anson Huang to enable LCD panel and backlight support
for imx6sll-evk board.
- Make pfuze100 sw4 regulator always-on for for a few Freescale/NXP
development boards, because the regulator is critical there and
cannot be turned off.
- Add more device support for i.MX5: AIPSTZ, SAHARA Crypto, M4IF,
Tigerp, PMU, CodaHx4 VPU.
- Enable PMU secure-reg-access for imx51-babbage, imx51-zii-rdu1 and
imx53-ppd board.
- Switch more device tree license to use SPDX identifier.
- Switch to use OF graph to describe the display for imx7d-nitrogen7.
- Add chosen/stdout-path for more boards, so that earlycon can be
enabled more easily on kernel cmdline.
- Convert GPC to new device tree bindings and add Vivante gpu nodes
for i.MX6SL SoC.
- Add more device support for imx6dl-mamoj board: parallel display,
WiFi and USB.
- A series from Stefan Agner to update i.MX6 apalis/colibri boards on
various aspects: SD/MMC card detection, regulators, etc.
* tag 'imx-dt-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (96 commits)
ARM: dts: imx7d: remove "operating-points" property for cpu1
ARM: dts: vf610-zii-ssmb-spu3: Fix W=1 level warnings
ARM: dts: vf610: Add ZII CFU1 board
ARM: dts: imx6dl-mamoj: Add usb host and device support
ARM: dts: imx6dl-mamoj: Add Wifi support
ARM: dts: imx6dl-mamoj: Add parallel display support
ARM: dts: vf610: Add ZII SSMB SPU3 board
ARM: dts: imx6ul-pico-hobbit: Do not hardcode the memory size
ARM: dts: imx6sl-evk: make pfuze100 sw4 always on
ARM: dts: imx6sll-evk: make pfuze100 sw4 always on
ARM: dts: imx6sx-sdb-reva: make pfuze100 sw4 always on
ARM: dts: imx6qdl-sabresd: make pfuze100 sw4 always on
ARM: dts: imx6sl-evk: add missing GPIO iomux setting
ARM: dts: imx51-zii-scu3-esb: Fix RAVE SP watchdog compatible string
ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
ARM: dts: imx6sx-nitrogen6sx: remove obsolete display configuration
ARM: dts: imx7d-nitrogen7: use OF graph to describe the display
ARM: dts: imx: Switch Boundary Devices boards to SPDX identifier
ARM: dts: imx6sl: Add vivante gpu nodes
ARM: dts: imx6sll-evk: enable SEIKO 43WVF1G lcdif panel
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Renesas ARM Based SoC DT Bindings Updates for v4.19
Bindings relating to initial support for RZ/N1D (R9A06G032) SoC and its
RZN1D-DB board:
* Add Renesas R9A06G032 SMP enable method
* Document SoC and Board bindings
* tag 'renesas-dt-bindings-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
dt-bindings: cpu: Add Renesas R9A06G032 SMP enable method.
dt-bindings: arm: Document the RZN1D-DB board
Signed-off-by: Olof Johansson <olof@lixom.net>
AT91 DT for 4.19:
- New boards from Laird: WB45N, WB50N, SOM60 modules and DVK, Gatwick
- fix the PMC compatibles
* tag 'at91-ab-4.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: fix typos for SSC TD functions
ARM: dts: add support for Laird SOM60 module and DVK boards
ARM: dts: add support for Gatwick board based on WB50N
ARM: dts: add support for Laird WB50N cpu module and DVK
ARM: dts: add support for Laird WB45N cpu module and DVK
ARM: dts: at91: add labels to soc dtsi for derivative boards
dt-bindings: add laird and giantec vendor prefix
ARM: dts: fix PMC compatible
ARM: at91: fix USB clock detection handling
dt-bindings: clk: at91: Document all the PMC compatibles
dt-bindings: arm: remove PMC bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Few more beaglebone variants for v4.19 merge window
This adds dts files for two new beaglebone variants for
Octavo Systems OSD3358-SM-RED and Sancloud am335x-sancloud-bbe.
* tag 'omap-for-v4.19/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x: add am335x-sancloud-bbe board support
dt-bindings: Add vendor prefix for Sancloud
ARM: dts: Add DT support for Octavo Systems OSD3358-SM-RED based on TI AM335x
Signed-off-by: Olof Johansson <olof@lixom.net>
Add device binding documentation for Qualcomm Technology Inc's RPMH RSC
driver. The driver is used for communicating resource state requests for
shared resources.
Cc: devicetree@vger.kernel.org
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
[rplsssn@codeaurora.org: minor order correction for TCS type]
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Serial aliases are optional since commit 7678f4c20f ("serial:
sh-sci: Add support for dynamic instances").
Update the DT bindings to reflect this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The RZ/N1 UART is a modified Synopsys DesignWare UART.
The modifications only relate to DMA so you could actually use the
controller with the Synopsys compatible string if you are not using
DMA, but you should not do so.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add the DT bindings documentation for axg's TDM interfaces
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Tanix TX3 Mini is a TV box based on the Amlogic S905W chipset. It
comes with:
- 1 GiB or 2 GiB of DDR3 memory depending on the model
- 8 GB or 16 GB eMMC flash depending on the model
- 802.11 b/g/n wifi (Silicon Valley Microelectronics SSV6051, does not
support Bluetooth, not supported by any mailine driver)
- an LED 7 segment display with an FD628 controller (not supported by
any mainline driver)
- HDMI and AV (CVBS) output
- 2x USB (utilizing both USB ports provided by the SoC)
- micro SD card slot
The board seems to be very similar to the P23x and Q20x reference
boards:
- eMMC reset routed to BOOT_9
- the SDIO wifi chip's reset line is routed to GPIOX_6 and the reference
clock is 32.768KHz on PWM_E
- SD card detection is routed to CARD_6
- vqmmc of all MMC controllers is hard-wired to 1.8V (VDDIO_BOOT)
- uart_AO can be accessed after opening the case and soldering RX, TX
and GND lines onto the exposed solder points (marked with RX, TX and
GND)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
S905W SoC is another SoC from the GXL family. It is a cost-reduced
version of the S905X SoC. The following differences are known:
- S905W supports HDMI resolutions up to 4k@30fps (while S905X support
resolutions up to 4k@60fps)
- the built-in video decoders of S905W decode up to 4k@30fps (while
S905X supports decoding up to 4k@60fps)
- CPU speed on S905W is limited to 1.2GHz (compared to 1.5GHz on S905X,
this is handled in the SCPI firmware)
- the DRAM interface on S905W is limited to 16-bit (GXL supports both,
16-bit and 32-bit)
Notes based on Amlogic's GPL kernel sources:
- the P281 is a development board from Amlogic which uses the S905W SoC.
Amlogic's GPL kernel sources indicate that it uses the same PCB layout
as the "P231" board (and simply replaces the S905D from the original
P231 board with a S905W SoC).
- it is assumed that the S905W SoC is pin-compatible with the S905X SoC
since Amlogic's GPL kernel sources use the same driver for both SoCs.
- gxl_p281_1g.dts contains a comment which mentions that "max gp pll for
gpu is 650M, temporarily disabled". However, it seems to boot fine
with 744MHz (as used on GXBB and the other GXL SoCs).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
According to their website (http://www.oranth.com/about-oranth/)
Shenzhen Oranth Technology Co., Ltd. (or simply "Oranth") "is a
professional Design House & Manufacturer for Android TV Box established
in 2014". One of their brands is Tanix (sometimes also spelled "TANIX").
One of their most popular devices is the "Tanix TX3 Mini" TV box (which
uses the Amlogic S905W chipset).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add dt-bindings for the audio memory arbiter found on Amlogic's
A113 based SoCs
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Document Mediatek X20 Development Board which is a 96Boards Consumer
Edition platform based on MT6797 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The S805X is a variant of the Amlogic Meson GXL SoC family with the
following physical limitations :
- No SDCard interface
- No GPIOCLK pins
- No USB OTG ID pin (but Gadget feature can stil be forced)
- No 5V regulator
- Reduced ADC inputs (only ADC0 and ADC1)
- GPIODV_26, GPIOAO_3, GPIOAO_4, GPIOAO_5, GPIOAO_6, GPIOX_14,
GPIOX_15, GPIOH_3 are no more exposed on the package
Amlogic exposes the following SW limitations :
- HDMI max resolution should be 1080p60, VPU clock should be downgraded
- Video Decoding should be limited to 1080p60, VDEC clock should be downgraded
- CPU speed should be limited by SCPI OPP table to 1.2GHz
- DRAM interface is limited to DDR4 16bit up to 1GiB
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Commit 34962fb807 ("docs: Fix more broken references") replaced the
broken reference to rockchip,dwc3-usb-phy.txt binding for the Qualcomm
DWC3 binding (qcom-dwc3-usb-phy.txt). That's wrong, so replace that
reference for the correct ones.
Fixes: 34962fb807 ("docs: Fix more broken references")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Rob Herring <robh@kernel.org>
The interrupt controller of the JZ4725B works the same way as the other
JZ SoCs from Ingenic; so we just add a new compatible string.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
