Stephen Boyd
faff3d8e85
Merge branch 'clk-renesas' into clk-next
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* clk-renesas: (36 commits)
clk: renesas: r7s9210: Add SPI clocks
clk: renesas: r7s9210: Move table update to separate function
clk: renesas: r7s9210: Convert some clocks to early
clk: renesas: cpg-mssr: Add early clock support
clk: renesas: r8a77970: Add TPU clock
clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment
dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0
clk: renesas: cpg-mssr: Add r8a774c0 support
clk: renesas: Add r8a774c0 CPG Core Clock Definitions
clk: renesas: r8a7743: Add r8a7744 support
clk: renesas: Add r8a7744 CPG Core Clock Definitions
dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding
dt-bindings: clock: renesas: Convert to SPDX identifiers
clk: renesas: cpg-mssr: Add R7S9210 support
clk: renesas: r8a77970: Add TMU clocks
clk: renesas: r8a77970: Add CMT clocks
clk: renesas: r9a06g032: Fix UART34567 clock rate
clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI
clk: renesas: r8a77980: Add CMT clocks
clk: renesas: r8a77990: Add missing I2C7 clock
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2018-10-18 15:38:51 -07:00
Kuninori Morimoto
9e288cefcc
clk: renesas: Convert to SPDX identifiers
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This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com >
[rebased against clk-spdx]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
Reviewed-by: Simon Horman <horms+renesas@verge.net.au >
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2018-09-28 17:16:37 -07:00
Sergei Shtylyov
9ef5e0370d
clk: renesas: r8a77970: Add TPU clock
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The TPU0 clock wasn't present in the original R8A77970 patch by Daisuke
Matsushita, it was added in a later BSP version...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com >
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com >
Reviewed-by: Simon Horman <horms+renesas@verge.net.au >
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
2018-09-25 08:56:09 +02:00
Sergei Shtylyov
6207ba0434
clk: renesas: r8a77970: Add TMU clocks
...
The TMU clocks weren't present in the original R8A77970 patch by Daisuke
Matsushita, they were added in a later BSP version...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com >
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com >
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
2018-09-11 11:58:52 +02:00
Sergei Shtylyov
5986b503da
clk: renesas: r8a77970: Add CMT clocks
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Add the R8A77970 CMT module clocks.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com >
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com >
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com >
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
2018-09-11 11:58:02 +02:00
Sergei Shtylyov
381081ffc2
clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI
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On R-Car V3M (AKA R8A77970), the SD0CKCR is laid out differently than on
the other R-Car gen3 SoCs. In fact, the layout is the same as on R-Car gen2
SoCs, so we'll need to copy the divisor tables from the R-Car gen2 driver.
We'll also need to support the SoC specific clock types, thus we're adding
CLK_TYPE_GEN3_SOC_BASE at the end of 'enum rcar_gen3_clk_types', declare
SD0H/SDH clocks in 'enum r8a77970_clk_types', and handle those clocks in
the overridden cpg_clk_register() method; then, finally, add the SD-IF
module clock (derived from the SD0 clock).
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com >
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
2018-09-03 09:58:33 +02:00
Sergei Shtylyov
64082568dd
clk: renesas: r8a77970: Add LVDS clock
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I seem to have omitted the LVDS clock from the R8A77970 CPG/MSSR support
patch for some reason -- add it back...
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com >.
Fixes: 8d46e28fb5vladimir.barinov@cogentembedded.com >
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com >
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
2017-12-08 13:52:45 +01:00
Sergei Shtylyov
8d46e28fb5
clk: renesas: cpg-mssr: Add R8A77970 support
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Add R-Car V3M (R8A77970) Clock Pulse Generator / Module Standby and
Software Reset support, using the CPG/MSSR driver core and the common
R-Car Gen3 code.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com >.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com >
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com >
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be >
2017-09-19 10:57:35 +02:00
