Commit Graph

2670 Commits

Author SHA1 Message Date
Gabor Juhos
8838becdf5 MIPS: ath79: fix GPIO function selection for AR934x SoCs
GPIO function selection is not working on the AR934x
SoCs because the offset of the function selection
register is different on those.

Add a helper routine which returns the correct
register address based on the SoC type, and use
that in the 'ath79_gpio_function_*' routines.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4870/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Steven J. Hill
778eeb1b19 MIPS: Add new GIC clocksource.
Add new clocksource that uses the counter present on the MIPS
Global Interrupt Controller.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4681/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:21 +01:00
Steven J. Hill
4cb764b454 MIPS: dsp: Simplify the DSP macros.
Simplify the DSP macros for vanilla (non-microMIPS) kernels and
toolchains that do not support the DSP ASEs.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4687/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:24 +01:00
Steven J. Hill
d0c1b478e0 MIPS: dsp: Support toolchains without DSP ASE and microMIPS.
Add macros to support the DSP ASE with microMIPS kernels when the
toolchain does not have support.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4686/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:24 +01:00
Steven J. Hill
32a7ede673 MIPS: dsp: Add assembler support for DSP ASEs.
Newer toolchains support the DSP and DSP Rev2 instructions. This patch
performs a check for that support and adds compiler and assembler
flags for only the files that need use those instructions.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4752/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:23 +01:00
Steven J. Hill
f8fa4811db MIPS: Add support for the M14KEc core.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4682/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:23 +01:00
Steven J. Hill
127993e561 MIPS: Clean-ups for MIPS Technologies Inc. generic header file.
Clean up standard header text and remove unused #define.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4703/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:22 +01:00
Jayachandran C
5a4cbe3811 MIPS: Netlogic: No hazards needed for XLR/XLS
TLB and COP0 hazards are handled in hardware for Netlogic XLR/XLS
SoCs. Update hazards.h to pick more optimal set of definitions when
compiling for XLR/XLS.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4788/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:21 +01:00
Jayachandran C
4e45e542cd MIPS: Netlogic: Use PIC timer as a clocksource
The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC
frequencey. One of these can be used as a clocksource to provide
timestamps that is common across cores. This can be used in place
of the count/compare clocksource which is per-CPU.

On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits
of the PIC counter. On XLP, the whole 64-bit can be used.

Provide common macros and functions for PIC timer registers on XLR/XLS
and XLP, and use them to register a PIC clocksource.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4786/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:20 +01:00
Jayachandran C
a69ba6293d MIPS: Netlogic: Split XLP L1 i-cache among threads
Since we now use r4k cache code for Netlogic XLP, it is
better to split L1 icache among the active threads, so that
threads won't step on each other while flushing icache.

The L1 dcache is already split among the threads in the core.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4787/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:20 +01:00
Jayachandran C
220d9122e8 MIPS: Netlogic: Optimize EIMR/EIRR accesses in 32-bit
Provide functions ack_c0_eirr(), set_c0_eimr(), clear_c0_eimr()
and read_c0_eirr_and_eimr() that do the EIMR and EIRR operations
and update the interrupt handling code to use these functions.
Also, use the EIMR register functions to mask interrupts in the
irq code.

The 64-bit interrupt request and mask registers (EIRR and EIMR) are
accessed when the interrupts are off, and the common operations are
to set or clear a bit in these registers. Using the 64-bit c0 access
functions for these operations is not optimal in 32-bit, because it
will disable/restore interrupts and split/join the 64-bit value during
each register access.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4790/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:19 +01:00
John Crispin
2636562594 MIPS: lantiq: rework external irq code
This code makes the irqs used by the EIU loadable from the DT. Additionally we
add a helper that allows the pinctrl layer to map external irqs to real irq
numbers.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4818/
2013-02-17 00:15:18 +01:00
John Crispin
740c606e8e MIPS: lantiq: adds static clock for PP32
The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/
2013-02-17 00:15:17 +01:00
Ralf Baechle
5b003119ab MIPS: Cleanup break and trap codes.
Very ancient out-of-tree KDB versions were using BRK_KDB code but it's
unused in modern kernels since a long time.  Delete it.

The microMIPS encoding only reserves 4 bits for a trap code so it's time
for further weedkilling.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-15 23:07:38 +01:00
Steven J. Hill
8e8dc33543 MIPS: Redefine value of BRK_BUG.
The BRK_BUG value is used in the BUG and __BUG_ON inline macros. For
standard MIPS cores the code in the 'tne' instruction is 10-bits long.
In microMIPS, the 'tne' instruction is recoded and the code can only be
4-bits long. We change the value to 12 instead of 512 so that both classic
and microMIPS kernels build.

[ralf@linux-mips.org: Many of the break codes starting from 0 are used
across many MIPS UNIX variants.  Codes starting from 512 are operating
system specific additions.  1023 again is also used by other operating
systems]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-15 23:07:38 +01:00
Steven J. Hill
a96102be70 MIPS: Add printing of ISA version in cpuinfo.
Display the MIPS ISA version release in the /proc/cpuinfo file.

[ralf@linux-mips.org: Add support for MIPS I ... IV legacy architecture
revisions.  Also differenciate between MIPS32 and MIPS64 versions instead
of lumping them together as just r1 and r2.

Note to application programmers: this indicates the CPU's ISA level
It does not imply the current execution environment does support it.  For
example an O32 application seeing "mips64r2" would still be restricted by
by the execution environment to 32-bit - but the kernel could run mips64r2
code.  The same for a 32-bit kernel running on a 64-bit processor.  This
field doesn't include ASEs or optional architecture modules nor other
detailed flags such as the availability of an FPU.]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/4714/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-15 23:07:38 +01:00
Hauke Mehrtens
111bd981e2 MIPS: BCM47XX: add bcm47xx prefix in front of nvram function names
The nvram functions are exported and used by some normal drivers. To
prevent name clashes with ofter parts of the kernel code add a bcm47xx_
prefix in front of the function names and the header file name.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4744/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:57 +01:00
Hauke Mehrtens
ee7e2f3c23 MIPS: BCM47XX: use common error codes in nvram reads
Instead of using our own error codes use some common codes.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4739/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-15 19:01:56 +01:00
Al Viro
d64008a8f3 burying unused conditionals
__ARCH_WANT_SYS_RT_SIGACTION,
__ARCH_WANT_SYS_RT_SIGSUSPEND,
__ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND,
__ARCH_WANT_COMPAT_SYS_SCHED_RR_GET_INTERVAL - not used anymore
CONFIG_GENERIC_{SIGALTSTACK,COMPAT_RT_SIG{ACTION,QUEUEINFO,PENDING,PROCMASK}} -
can be assumed always set.
2013-02-14 09:21:15 -05:00
David S. Miller
fd5023111c Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Synchronize with 'net' in order to sort out some l2tp, wireless, and
ipv6 GRE fixes that will be built on top of in 'net-next'.

Signed-off-by: David S. Miller <davem@davemloft.net>
2013-02-08 18:02:14 -05:00
Al Viro
50150d2bb9 mips: switch to generic sys_fork() and sys_clone()
we still need the wrappers to store callee-saved registers in
pt_regs, but once that done we can jump to kernel/fork.c variants.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-03 18:33:02 -05:00
Al Viro
ea536ad4f2 mips: switch to generic sigaltstack
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-03 18:32:24 -05:00
Al Viro
574c4866e3 consolidate kernel-side struct sigaction declarations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-03 15:09:22 -05:00
Al Viro
92a3ce4a1e consolidate declarations of k_sigaction
Only alpha and sparc are unusual - they have ka_restorer in it.
And nobody needs that exposed to userland.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-03 15:09:22 -05:00
Ralf Baechle
0f3a05cb43 MIPS: MSP71xx: Move code.
Now that Yosemite's gone we can move the MSP71xx code one level up.

Shane McDonald <mcdonald.shane@gmail.com>'s
https://patchwork.linux-mips.org/patch/4736/ has been folded into this
patch.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Ralf Baechle
7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Ralf Baechle
82de378caa MIPS: Nuke trailing whitespace.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:21 +01:00
Ralf Baechle
e33b0451e9 MIPS: PNX8550: Remove support for SOC and JBS and STB810 boards.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:21 +01:00
Steven J. Hill
9b73100911 MIPS: SEAD3: Implement OF support.
Activate USE_OF for SEAD-3 platform. Add basic DTS file and convert memory
detection and reservations to use OF.

[ralf@linux-mips.org: Remove unnecessary #ifdef wrapper in generic.h.  Make
<asm/mips-boards/generic.h> inclusion work even without prior
<linux/of_fdt.h> inclusion.]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4809/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:21 +01:00
Ralf Baechle
8fba1e588b MIPS: inst.h: Add MDMX and paired single instruction aka MIPS-3D formats.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:21 +01:00
Ralf Baechle
85dfaf0831 MIPS: inst.h: Eleminate per endianess structure definitions.
This makes space for further growth of the header without excessive bloat.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:20 +01:00
Ralf Baechle
90e8cacdbe MIPS: UAPI: Split inst.h into exported and kernel-only part.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:20 +01:00
Steven J. Hill
b9688310d7 MIPS: Whitespace cleanups and reformatting.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Cc: Steven J. Hill <sjhill@mips.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4781/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:20 +01:00
Jiri Kosina
617677295b Merge branch 'master' into for-next
Conflicts:
	drivers/devfreq/exynos4_bus.c

Sync with Linus' tree to be able to apply patches that are
against newer code (mvneta).
2013-01-29 10:48:30 +01:00
Thomas Graf
5588d3742d Remove leftover #endif after introducing SO_REUSEPORT
Commit 055dc21a1d (soreuseport: infrastructure) removed the #if 0
around SO_REUSEPORT without removing the corresponding #endif
thus causing the header guard to close early.

Cc: Tom Herbert <therbert@google.com>
Signed-off-by: Thomas Graf <tgraf@suug.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-27 01:01:41 -05:00
Steven J. Hill
6829aeae47 MIPS: DSP: Fix DSP mask for registers.
The DSP bit mask for the RDDSP and WRDSP instructions was wrong.

[ralf@linux-mips.org: The mask field of the RDDSP and WRDSP instructions
is 10 bits long.  DSP_MASK had all these fields which according to the
architecture specification may result in UNPREDICTABLE operation.]

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/4683/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-24 13:20:09 +01:00
Tom Herbert
055dc21a1d soreuseport: infrastructure
Definitions and macros for implementing soreusport.

Signed-off-by: Tom Herbert <therbert@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-23 13:44:00 -05:00
David Daney
86ea9c51b9 MIPS: Fix build failure by adding definition of pfn_pmd().
With CONFIG_TRANSPARENT_HUGEPAGE=y and CONFIG_HUGETLBFS=y we get the
following build failure:

  CC      mm/huge_memory.o
mm/huge_memory.c: In function 'set_huge_zero_page':
mm/huge_memory.c:780:2: error: implicit declaration of function 'pfn_pmd' [-Werror=implicit-function-declaration]
mm/huge_memory.c:780:8: error: incompatible types when assigning to type 'pmd_t' from type 'int'

Add a definition of pfn_pmd() for 64-bit kernels (the only place huge
pages are currently supported).

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4813/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-23 11:56:44 +01:00
Ralf Baechle
f051e3a933 MIPS: PNX833x: Fix comment.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-22 12:52:22 +01:00
Ralf Baechle
9561fefc98 MIPS: Add struct p_format to union mips_instruction.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-17 15:33:00 +01:00
Vincent Bernat
d59577b6ff sk-filter: Add ability to lock a socket filter program
While a privileged program can open a raw socket, attach some
restrictive filter and drop its privileges (or send the socket to an
unprivileged program through some Unix socket), the filter can still
be removed or modified by the unprivileged program. This commit adds a
socket option to lock the filter (SO_LOCK_FILTER) preventing any
modification of a socket filter program.

This is similar to OpenBSD BIOCLOCK ioctl on bpf sockets, except even
root is not allowed change/drop the filter.

The state of the lock can be read with getsockopt(). No error is
triggered if the state is not changed. -EPERM is returned when a user
tries to remove the lock or to change/remove the filter while the lock
is active. The check is done directly in sk_attach_filter() and
sk_detach_filter() and does not affect only setsockopt() syscall.

Signed-off-by: Vincent Bernat <bernat@luffy.cx>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-17 03:21:25 -05:00
Ralf Baechle
0bc1c15735 MIPS: Export <asm/break.h>.
It always should have been ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-16 16:57:27 +01:00
Linus Torvalds
5ce2955e04 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle:
 "Various fixes across the tree.  The modpost error due to
  virt_addr_valid() not being usable from modules required a number of
  preparatory cleanups so a clean fix was possible."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: 64-bit: Fix build if !CONFIG_MODULES
  MIPS: Wire up finit_module syscall.
  MIPS: Fix modpost error in modules attepting to use virt_addr_valid().
  MIPS: page.h: Remove now unnecessary #ifndef __ASSEMBLY__ wrapper.
  MIPS: Switch remaining assembler PAGE_SIZE users to <asm/asm-offsets.h>.
  MIPS: Include PAGE_S{IZE,HIFT} in <asm/offset.h>.
  MIPS: Don't include <asm/page.h> unnecessarily.
  MIPS: Fix comment.
  Revert "MIPS: Optimise TLB handlers for MIPS32/64 R2 cores."
  MIPS: perf: Fix build failure in XLP perf support.
  MIPS: Alchemy: Make 32kHz and r4k timer coexist peacefully
2013-01-07 07:50:41 -08:00
Greg Kroah-Hartman
28eb0e4661 MIPS: drivers: remove __dev* attributes.
CONFIG_HOTPLUG is going away as an option.  As a result, the __dev*
markings need to be removed.

This change removes the use of __devinit, __devexit_p, __devinitdata,
and __devexit from these drivers.

Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.

Cc: Bill Pemberton <wfp5p@virginia.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-03 15:57:09 -08:00
Jorrit Schippers
d82603c6da treewide: Replace incomming with incoming in all comments and strings
Signed-off-by: Jorrit Schippers <jorrit@ncode.nl>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2013-01-03 16:15:49 +01:00
Ralf Baechle
6295150b73 MIPS: Wire up finit_module syscall.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-28 17:04:38 +01:00
Ralf Baechle
d3ce884318 MIPS: Fix modpost error in modules attepting to use virt_addr_valid().
ERROR: "min_low_pfn" [drivers/block/aoe/aoe.ko] undefined!

Fixed by moving the implementation of virt_addr_valid() into the kernel
proper and exporting it which removes the pains of an inline or macro
implementation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-28 17:04:31 +01:00
Ralf Baechle
730b8dfe01 MIPS: page.h: Remove now unnecessary #ifndef __ASSEMBLY__ wrapper.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-28 17:04:23 +01:00
Ralf Baechle
02637b856c MIPS: Fix comment.
The value is incorrect and were copied in Linux 2.5.4 from i386.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-27 16:27:35 +01:00
Linus Torvalds
54d46ea993 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal
Pull signal handling cleanups from Al Viro:
 "sigaltstack infrastructure + conversion for x86, alpha and um,
  COMPAT_SYSCALL_DEFINE infrastructure.

  Note that there are several conflicts between "unify
  SS_ONSTACK/SS_DISABLE definitions" and UAPI patches in mainline;
  resolution is trivial - just remove definitions of SS_ONSTACK and
  SS_DISABLED from arch/*/uapi/asm/signal.h; they are all identical and
  include/uapi/linux/signal.h contains the unified variant."

Fixed up conflicts as per Al.

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal:
  alpha: switch to generic sigaltstack
  new helpers: __save_altstack/__compat_save_altstack, switch x86 and um to those
  generic compat_sys_sigaltstack()
  introduce generic sys_sigaltstack(), switch x86 and um to it
  new helper: compat_user_stack_pointer()
  new helper: restore_altstack()
  unify SS_ONSTACK/SS_DISABLE definitions
  new helper: current_user_stack_pointer()
  missing user_stack_pointer() instances
  Bury the conditionals from kernel_thread/kernel_execve series
  COMPAT_SYSCALL_DEFINE: infrastructure
2012-12-20 18:05:28 -08:00