Commit Graph

13345 Commits

Author SHA1 Message Date
Jörg Krause
1647fe3188 ARM: dts: sun7i: Enable audio codec on Banana Pro
This commit enables the on-chip audio codec present on the A20 SoC
on the Banana Pro board.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:50 +01:00
Emmanuel Vadot
9bbe3559b7 ARM: dts: sunxi: Add num-cs for A20 spi nodes
The spi0 controller on the A20 have up to 4 CS (Chip Select) while the
others three only have 1.
Add the num-cs property to each node.
The current driver doesn't read this property but this is useful for
downstream user of DTS (FreeBSD for example).

Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:49 +01:00
Emmanuel Vadot
b43776d65a ARM: dts: sunxi: Use axp209.dtsi for Olinuxino Lime2
Use axp209.dtsi in sun7i-a20-olinuxino-lime2.dts and correct
some regulators.

DCDC2 is used for vdd-cpu so it should never be bellow 1V and above 1.4V
DCDC3 is used for VDD_INT so same as above.
LD01 is used for the RTC, and should have a typical value of 1.3V
LD02 is used for AVCC and should have a typical value of 3.0V
LD03/4 are used for Port-E/Port-G Power pin, and the schematics recommands
to set them to 2.8V as they can be used for CSI0/1.

Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:49 +01:00
Icenowy Zheng
53e32e7032 ARM: dts: sun5i: add support for Lichee Pi One board
Lichee Pi One is a low-cost Allwinner A13-based development board, with
an AXP209 PMU, a USB2.0 OTG port, a USB2.0 host port (or an onboard
RTL8723BU Wi-Fi card), optional headers for LCD and CSI, two GPIO
headers and two MicroSD card slots (connected to mmc0 and mmc2, both
bootable).

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:48 +01:00
Icenowy Zheng
e6c5bfeaf2 ARM: dts: sun5i: add a pinctrl node for 4bit mmc2
Some board only use 4bit mode of mmc2.

Add a pinctrl node for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:47 +01:00
Marcus Cooper
ccb4e689ab ARM: dts: sun4i: A1000: add axp209 regulator nodes
This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi.

DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:46 +01:00
Marcus Cooper
63b31ba240 ARM: dts: sun6i: Add the SPDIF block to the A31
Add the SPDIF transceiver controller block to the A31 dtsi.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:46 +01:00
Marcus Cooper
5f396b1d39 ARM: dts: sun6i: Add SPDIF TX pin to the A31
Add the SPDIF TX pin to the A31 dtsi.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:45 +01:00
Marcus Cooper
ecdf526224 ARM: dts: sun6i: Mele I7: Enable internal audio codec
The Mele I7 has an audio jack for the SoC's internal codec.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:45 +01:00
Icenowy Zheng
b5fa16b620 ARM: dts: sun8i: add a delay after reset xr819 on Orange Pi Zero
XR819 seems to need a delay after its reset line to be deasserted,
otherwise it may not respond MMC commands correctly, and fail to
initialize.

Add a 200ms delay in the mmc-pwrseq.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:44 +01:00
Icenowy Zheng
03749eb88e ARM: dts: sun8i: add opp-v2 table for A33
An operating point table is needed for the cpu frequency adjusting to
work.

The operating point table is converted from the common value in
extracted script.fex from many A33 board/tablets.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:44 +01:00
Icenowy Zheng
90f6e8f4a3 ARM: dts: sun8i: set cpu-supply in reference tablet DTSI
All reference design A33 tablets uses DCDC2 of AXP223 as the power
supply of the Cortex-A7 cores.

Set the cpu-supply in the DTSI of sun8i reference tablets.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:43 +01:00
Icenowy Zheng
7d1be43fe0 ARM: dts: sun8i: add a cpu0 label to cpu@0 node on A23/33
A "cpu0" label is needed on cpu@0 for cpufreq-dt to work.

Add such a label, in order to prepare for cpufreq support of A23/33.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:43 +01:00
Icenowy Zheng
054e52fb60 ARM: dts: sunxi: add support for Orange Pi Zero board
Orange Pi Zero is a board that came with the new Allwinner H2+ SoC and a
SDIO Wi-Fi chip by Allwinner (XR819).

Add a device tree file for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:42 +01:00
Chen-Yu Tsai
b67379a6ac ARM: dts: sun6i: hummingbird: Enable USB OTG
The A31 Hummingbird has a mini USB OTG port, and uses GPIO pins from the
SoC for ID pin and VBUS detection and VBUS control. The PMIC can also do
VBUS detection and control.

Here we prefer to use the PMIC's DRIVEVBUS function to control VBUS for
USB OTG, as that is the hardware default.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:42 +01:00
Chen-Yu Tsai
80ee72e7e9 ARM: dts: sunxi: Explicitly enable pull-ups for MMC pins
In the past, all the MMC pins had

	allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

which was actually a no-op. We were relying on U-boot to set the bias
pull up for us. These properties were removed as part of the fix up to
actually support no bias on the pins. During the transition some boards
experienced regular MMC time-outs during normal operation, while others
completely failed to initialize the SD card.

Given that MMC starts in open-drain mode and the pull-ups are required,
it's best to enable it for all the pin settings.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:52:41 +01:00
Emmanuel Vadot
3116d37651 ARM: dts: sunxi: Change node name for pwrseq pin on Olinuxino-lime2-emmc
The node name for the power seq pin is mmc2@0 like the mmc2_pins_a one.
This makes the original node (mmc2_pins_a) scrapped out of the dtb and
result in a unusable eMMC if U-Boot didn't configured the pins to the
correct functions.

Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:33:16 +01:00
Milo Kim
661ccdc1a9 ARM: dts: sun8i: Support DTB build for NanoPi M1
The commit 10efbf5f16 ("ARM: dts: sun8i: Add dts file for NanoPi M1 SBC")
introduced NanoPi M1 board but it's missing in Allwinner H3 DTB build.

Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:32:08 +01:00
Chen-Yu Tsai
6b546c2a15 ARM: dts: sun6i: hummingbird: Enable display engine again
Now that we disable the display engine by default, we need to re-enable
it for the Hummingbird A31, which already had its display pipeline
enabled.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:32:07 +01:00
Chen-Yu Tsai
205ac7b33e ARM: dts: sun6i: Disable display pipeline by default
While we now support the internal display pipeline found on sun6i, it
is possible that we are unable to enable the display for some boards,
due to a lack of drivers for the panels or bridges found on them. If
the display pipeline is enabled, the driver will try to enable, and
possibly screw up the simple framebuffer U-boot had configured.

Disable the display pipeline by default.

Fixes: 6d0e5b70be ("ARM: dts: sun6i: Add device nodes for first
		      display pipeline")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-10 18:32:07 +01:00
Peter Rosin
21dd0ece34 ARM: dts: at91: add devicetree for the Axentia TSE-850
The Axentia TSE-850 is a SAMA5D3-based device designed to generate
FM subcarrier signals.

Signed-off-by: Peter Rosin <peda@axentia.se>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 16:16:33 +01:00
Wenyou Yang
5347d80655 ARM: dts: at91: add dts file for sama5d36ek CMP board
The sama5d36ek CMP board is the variant of sama5d3xek board.
It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865 and
some power rail. Its main purpose is used to measure the power
consumption.
The difference of the sama5d36ek CMP dts from sama5d36ek dts is
listed as below.
 1. The USB host nodes are removed, that is, the USB host is disabled.
 2. The gpio_keys node is added to wake up from the sleep.
 3. The LCD isn't supported due to the pins for LCD are conflicted
    with gpio_keys.
 4. The adc0 node support the pinctrl sleep state to fix the over
    consumption on VDDANA.

As said in errata, "When the USB host ports are used in high speed
mode (EHCI), it is not possible to suspend the ports if no device is
attached on each port. This leads to increased power consumption even
if the system is in a low power mode." That is why the the USB host
is disabled.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 15:48:19 +01:00
Alex
6c1652af61 ARM: dts: at91: sama5d2: add ssc0 definition
The sama5d2 SoC has Synchronous Serial Controller which provides
synchronous communication link with external devices.
It's generally used in audio and telecom applications such as
I2S, Short Frame Sync, Long Frame Sync.

Signed-off-by: Alex Gershgorin <alex.gershgorin@qcore.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 15:42:33 +01:00
Nicolas Ferre
89a236d68a ARM: dts: at91: sama5d2 Xplained: use DMA for UART3
Use DMA for UART3 as we have enough channels and to show how to
specify DMA use with serial nodes.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 15:42:33 +01:00
Nicolas Ferre
f72d20fed9 ARM: dts: at91: sama5d2: move UART3 to DMA1
Now that DMA1 is defined, use it to distribute channel usage among the two
controllers.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 15:42:33 +01:00
Nicolas Ferre
22eb6cc222 ARM: dts: at91: add dma1 definition to sama5d2
The sama5d2 SoC has a second DMA controller and can be used just like DMA0.
By default both DMA controllers are configured as "Secure" in
MATRIX_SPSELR so we can use whichever we want in a "single Secure World"
configuration.
Surprisingly the DMA1 has a lower address than DMA0. To avoid confusion
place it after DMA0 node anyway.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 15:42:33 +01:00
Nicolas Ferre
0d98013de8 ARM: dts: at91: sama5d4 Xplained: enable UART1 node with DMA
Enable UART1 and use DMA configuration with it.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 15:42:32 +01:00
Nicolas Ferre
e60f791138 ARM: dts: at91: sama5d4: change DMA allocation for secure peripherals
Some peripherals are "Programmable Secure" but left as "Secure" by default.
If tried to be connected to Non-Secure DMA controller, the possibility to
leak secure data is prevented so using these peripherals with DMA1 is not
possible with this default configuration (MATRIX_SPSELR registers setup by
bootloader).
Move them to DMA0 which is an "Always-Secure" DMA controller.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 15:42:32 +01:00
Peter Rosin
1c1d369408 ARM: dts: at91: sama5d3_uart: fix reg sizes to match documentation
The new size (0x100) also matches the size given in sama5d3.dtsi

Documentation reference: section 43.6 "Universal Asynchronous
Receiver Transmitter (UART) User Interface", table 43-4 "Register
Mapping" in [1].

[1] Atmel-11121F-ATARM-SAMA5D3-Series-Datasheet_02-Feb-16

Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-01-10 15:42:32 +01:00
Joel Stanley
8f9bafbb92 ARM: dts: aspeed: Add Romulus BMC platform
Romulus is an OpenPower machine with an ast2500 BMC. It has NCSI
networking and 512MB of RAM.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:46 +11:00
Joel Stanley
34ea5c9de3 ARM: dts: aspeed: Add ftgmac100 to g4 and g5 platforms
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:43 +11:00
Cyril Bur
9b08d4506c ARM: dts: aspeed: Correct palmetto device tree
Palmettos have 512MB of memory as opposed to the previously thought
256MB. Update the device trees accordingly.

We run the uart at 115200.

Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:40 +11:00
Cyril Bur
e53a7f1b99 ARM: dts: aspeed: Reserve framebuffer memory
When used as a BMC, the host expects to be able to use 16MB of
framebuffer memory at the top of RAM.

Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:37 +11:00
Andrew Jeffery
2039f90d13 ARM: dts: aspeed-g5: Add gpio controller to devicetree
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:35 +11:00
Andrew Jeffery
b590c8d2ee ARM: dts: aspeed-g5: Add syscon and pin controller nodes
The pin controller's child nodes expose the functions currently
implemented in the g5 pin controller driver.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:31 +11:00
Andrew Jeffery
cec822f89e ARM: dts: aspeed-g5: Add LPC Controller node
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:21 +11:00
Andrew Jeffery
daf042580a ARM: dts: aspeed-g5: Add SoC Display Controller node
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:19 +11:00
Andrew Jeffery
09955007b2 ARM: dts: aspeed-g4: Add gpio controller to devicetree
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:15 +11:00
Andrew Jeffery
d90722795e ARM: dts: aspeed-g4: Add syscon and pin controller nodes
The pin controller's child nodes expose the functions currently
implemented in the the g4 pin controller driver.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2017-01-10 21:55:12 +11:00
Gabriel Fernandez
cb5e497c0e ARM: dts: stm32: Include auxiliary stm32fx clock definition
This patch include auxiliary clock definition (clocks which are not derived
from system clock.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-01-10 11:52:42 +01:00
Gabriel Fernandez
c22188d40b ARM: dts: stm32: Add external I2S clock on stm32f429 MCU
This patch adds an external I2S clock in the DT.
The I2S clock could be derived from an external I2S clock or by I2S pll.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-01-10 11:52:07 +01:00
Fabrice GASNIER
0bacd39be9 ARM: dts: stm32: enable ADC on stm32f429i-eval board
Enable analog to digital converter on stm32f429i-eval board.
It has on-board potentimeter wired to ADC3 in8 analog pin and
uses fixed regulator to provide reference voltage.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-01-10 11:49:20 +01:00
Fabrice GASNIER
3604ef9c81 ARM: dts: stm32: Add ADC support to stm32f429
Add ADC support & pinctrl analog phandle (adc3_in8) to stm32f429.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-01-10 11:49:19 +01:00
Bruno Meirelles Herrera
6084ce05de ARM: dts: stm32: Add missing USART3 pin config to stm32f469-disco board
This patch adds USART3 pin configuration on PB10/PA11 pins
for STM32F469I-DISCO board.

Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-01-10 11:49:18 +01:00
Bruno Herrera
6d6122c218 ARM: dts: stm32: Fix memory size from 8MB to 16MB on stm32f469-disco board
This patch fix memory size to support 16MB of external SDRAM.

Signed-off-by: Bruno Herrera <bruherrera@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-01-10 11:49:18 +01:00
Kevin Hilman
5280bc3ed7 ARM: dts: davinci: da850-lcdk: enable VPIF
Enable VPIF for video captpure and configure input channel 0, used for
composite input.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-01-10 15:09:29 +05:30
Kevin Hilman
8922306e25 ARM: dts: davinci: da850-evm: enable VPIF
Enable VPIF node for video capture, and configure ports.  EVM board
uses channel 0 for composite input and channel 1 S-Video input.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-01-10 15:07:32 +05:30
Kevin Hilman
6afa43a4bc ARM: dts: davinci: da850: VPIF: add node and muxing
Add VPIF node and pins to da850 SoC.  VPIF has two input channels which
can be described using the standard DT ports and endpoints.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[nsekhar@ti.com: drop stray newline, typo fixes in commit message]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-01-10 15:05:33 +05:30
Andrey Smirnov
d4cd158176 ARM: dts: vf610-zii-dev: Add .dts file for rev. C
Add .dts file for rev. C of the board by factoring out commonalities
into a shared include file (vf610-zii-dev-rev-b-c.dtsi) and deriving
revision specific file from it (vf610-zii-dev-rev-b.dts and
vf610-zii-dev-reb-c.dts).

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Stefan Agner <stefan@agner.ch>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: andrew@lunn.ch
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: cphealy@gmail.com
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-10 15:51:17 +08:00
Andrey Smirnov
73f2e6593b ARM: dts: vf610-zii-dev-rev-b: Remove leftover PWM pingroup
Remove pwm0grp since it is:

	a) Not referenced anywhere in the DTS file (unlike Tower board it
	is based on, this board does not use/expose FTM0)

	b) Configures PTB2 and PTB3 in a way that contradicts
	pinctrl-mdio-mux

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Stefan Agner <stefan@agner.ch>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: andrew@lunn.ch
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Cc: cphealy@gmail.com
Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-10 15:51:00 +08:00