Commit Graph

50404 Commits

Author SHA1 Message Date
Shashank Sharma
668b6c176c drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON
LSPCON chips can generate YCBCR outputs, if asked nicely :).

In order to generate YCBCR 4:2:0 outputs, a source must:
- send YCBCR 4:4:4 signals to LSPCON
- program color space as 4:2:0 in AVI infoframes

Whereas for YCBCR 4:4:4 outputs, the source must:
- send YCBCR 4:4:4 signals to LSPCON
- program color space as 4:4:4 in AVI infoframes

So for both 4:2:0 as well as 4:4:4 outputs, we are driving the
pipe for YCBCR 4:4:4 output, but AVI infoframe's color space
information indicates LSPCON FW to start scaling down from YCBCR
4:4:4 and generate YCBCR 4:2:0 output. As the scaling is done by
LSPCON device, we need not to reserve a scaler for 4:2:0 outputs.

V2: rebase
V3: Addressed review comments from Ville
    - add enum crtc_output_format instead of bool ycbcr420
    - use crtc_output_format=4:4:4 for modeset of LSPCON 4:2:0 output
      cases in this way we will have YCBCR 4:4:4 framework ready (except
      the ABI part)
V4: Added r-b from Maarten (for v3)
    Addressed review comments from Ville:
    - Do not add a non-atomic state variable to determine lspcon output.
      Instead add bool in CRTC state to indicate lspcon based scaling.
V5: Addressed review comments from Ville:
    - Change the state bool name from external scaling to something more
      relavent.
    - Keep the info and adjusted_mode structures const.
    - use crtc_state instead of pipe_config.
    - Push all the config change into lspcon_ycbcr420_config function.
V6: Rebase, small changes to accommodate changes in patch 2.
V7: Fixed checkpatch warnings for alignment
V8: Rebase

    PS: Ignored following warnings to match the current formatting:
    drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON
     -:53: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
    #53: FILE: drivers/gpu/drm/i915/i915_reg.h:8721:
    +#define  TRANS_MSA_SAMPLING_444        (2<<1)
                                          ^
    -:54: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
    #54: FILE: drivers/gpu/drm/i915/i915_reg.h:8722:
    +#define  TRANS_MSA_CLRSP_YCBCR         (2<<3)
V9: Rebase
V10: Rebase
V11: Rebase

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-8-git-send-email-shashank.sharma@intel.com
2018-10-15 16:03:21 +03:00
Shashank Sharma
799a964ffe drm/i915: Write AVI infoframes for Parade LSPCON
Different LSPCON vendors specify their custom methods to pass
AVI infoframes to the LSPCON chip, so does Parade tech.

This patch adds functions to arrange and write AVI infoframes
into Parade LSPCON chips.

V2: rebase
V3: Added r-b from Maarten
V4: rebase
V5: rebase
V6: rebase
V7: Fixed checkpatch warnings for alignment
V8: Rebase
V9: Rebase
V10: Rebase

Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-7-git-send-email-shashank.sharma@intel.com
2018-10-15 16:01:51 +03:00
Shashank Sharma
7cbf19fd54 drm/i915: Write AVI infoframes for MCA LSPCON
LSPCON is a DP branch device, so LSPCON vendors define
specific methods to pass AVI infoframes to the the chip.
This patch adds:
- a generic wrapper function for writing AVI infoframes for
  all LSPCON devices.
- a vendor specific function to wrire AVI infoframes into
  MCA LSPCON devices.

V2: Rebase
V3: Added r-b from Maarten
V4: Rebase
V5: Rebase
V6: Rebase
V7: Fixed checkpatch warnings for alignment
V8: Rebase
V9: Added the retry logic, with 50ms incremental delays while
    writing AVI IF
V10: Changed the return value check
V11: Fixed checkpatch warning
V12: Rebase

Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-6-git-send-email-shashank.sharma@intel.com
2018-10-15 16:01:51 +03:00
Shashank Sharma
06c812d7c5 drm/i915: Add AVI infoframe support for LSPCON
In order to pass AVI infoframes to LSPCON devices, a source has to
write them in a vendor recommended method and location.

This patch series:
- adds generic LSPCON infoframe setup functions.
- registers these functions into existing AVI infoframe framework.
- triggers these functions from modeset sequence.

Next patches in the series will add vendor specific code.

V2: Added new parameter to align with new definition of
    drm_hdmi_avi_infoframe_quant_range
V3: Added r-b from Maarten (for V2)
    Added new parameter output_format in struct lspcon to accommodate
    Ville's review comments on last patch of the series
V4: Addressed Ville's review comment
    - Do not add output_format in LSPCON state, as its non-atomic. Add
      this into CRTC state (added in a later patch).
V5: Rebase
V6: Rebase
V7: Rebase
V8: Rebase
V9: Rebase
V10: Rebase
V11: Accommodated rebasing changes in intel_git_port fptrs (set_infoframes and infoframe_enabled)

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-5-git-send-email-shashank.sharma@intel.com
2018-10-15 16:01:50 +03:00
Shashank Sharma
96e35598ce drm/i915: Check LSPCON vendor OUI
Intel LSPCON chip is provided by 2 vendors:
- Megachips America (MCA)
- Parade technologies (Parade tech)

Its important to know the vendor of this chip, as the address to
write AVI infoframes is different for those two.

This patch reads the vendor OUI signature, and marks into LSPCON
encoder structure for future usages.

This patch also does a small re-arrangement of the code, by moving
lspcon mode change into probe function.

V2: Use dp->desc for OUI detection, dont add a helper for this
    (Ville)
V3: Rebase, Added r-b from Maarten
V4: Rebase
V5: Rebase
V6: Rebase
V7: Rebase
V8: Rebase
V9: Rebase
V10: Rebase

Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-4-git-send-email-shashank.sharma@intel.com
2018-10-15 16:01:50 +03:00
Shashank Sharma
8c79f844c6 drm/i915: Add CRTC output format YCBCR 4:4:4
This patch adds support for YCBCR 4:4:4 CRTC output format.
To do this, this patch extends the existing YCBCR 4:2:0
framework by:
- Adding new parameter in for YCBCR 4:4:4 enum crtc_iutput_format.
- Adding case for YCBCR 4:4:4 in while setting AVI infoframes.
- Adding necessary checks in modeset sequence.

V3: Added this patch in the series
V4: Added r-b from Maarten (for v3)
    Addressed review comment from Ville:
    Do not use (config->output_format > CRTC_OUTPUT_RGB)
V5: Rebase
V6: Rebase and small change, to accommodate changes in patch 2
V7: Fixed checkpatch alignment warnings
V8: Rebase
V9: Rebase
V10: Rebase
V11: Addressed review comment from Ville
     Missing output_format_str[INTEL_OUTPUT_FORMAT_YCBCR444]
     Added Ville's R-B.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-3-git-send-email-shashank.sharma@intel.com
2018-10-15 16:01:50 +03:00
Shashank Sharma
33b7f3ee6e drm/i915: Add CRTC output format YCBCR 4:2:0
Currently, we are using a bool in CRTC state (state->ycbcr420),
to indicate modeset, that the output format is YCBCR 4:2:0. Now in
order to support other YCBCR formats, we will need more such flags.

This patch adds a new enum parameter for YCBCR 4:2:0 outputs, in the
CRTC output formats and then plugs it during the modeset.

V3: Added this patch in the series, to address review comments from
    second patchset.
V4: Added r-b from Maarten (on v3)
    Addressed review comments from Ville:
        - Change the enum name to intel_output_format.
        - Start the enum value (INVALID) from 0 instaed of 1.
        - Set the crtc's output_format to RGB in encoder's compute_config.
V5: Broke previous patch 1 into two parts,
    - first patch to add CRTC output format in general
    - second patch (this one) to add YCBCR 4:2:0 output
      format specifically.
    - Use ARRAY_SIZE(format_str) for output format validity check (Ville)
V6: Added a separate function to calculate crtc_state->output_format, and
    calling it from various get_config function (Fix CI build warning)
V7: Fixed checkpatch warnings for alignment
V8: Rebase
V9: Rebase
V10: Rebase
V11: Addressed review comments from Ville:
	- Change check for CRTC output format from > ARRAY_SIZE to >= ARRAY_SIZE.
	- Check for values < INTEL_OUTPUT_FORMAT_RGB is unnecessary.
	- No need to get CRTC YCBCR config, for pre-BDW functions.
    Added Ville's r-b.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-2-git-send-email-shashank.sharma@intel.com
2018-10-15 16:01:49 +03:00
Shashank Sharma
d9facae6af drm/i915: Introduce CRTC output format
This patch adds an enum "intel_output_format" to represent
the output format of a particular CRTC. This enum will be
used to produce a RGB/YCBCR4:4:4/YCBCR4:2:0 output format
during the atomic modeset calculations.

V5:
- Created this separate patch to introduce and init output_format.
- Initialize parameters of output_format_str respectively (Jani N).
- Call it intel_output_format than crtc_output_format(Ville).
- Set output format in pipe_config for every encoder (Ville).
- Get rid of extra DRM_DEBUG_KMS during get_pipe_config (Ville)

V6: Rebase
V7: Fixed alignment warnings (checkpatch)
V8: Another check[atch warning for alignment
V9: Rebase
V10: Rebase on top of DSI restructure
V11: Addressed review comment from Ville
	- Set CRTC format for pre-HSW get_pipe_config() function too.
     Added Ville's R-B

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-1-git-send-email-shashank.sharma@intel.com
2018-10-15 16:01:49 +03:00
Chris Wilson
a5e856a534 drm/i915: Large page offsets for pread/pwrite
Handle integer overflow when computing the sub-page length for shmem
backed pread/pwrite.

Reported-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181012140228.29783-1-chris@chris-wilson.co.uk
2018-10-15 12:52:03 +01:00
Jyoti Yadav
27d7aaae0f drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.
DC5 and DC6 counter register tells about residency of DC5 and DC6.
Added the same in debugfs file.

v2 : Remove csr_version check.
     Added generic check regarding DC counters for  Gen9 onwards. (Rodrigo)
v3 : Simplified gen checks. (Chris)
v4 : Simplified "if" ladder for multiple gens.
v5 : Removed unnecessary comment.

Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1538762926-4880-1-git-send-email-jyoti.r.yadav@intel.com
2018-10-12 15:44:32 -07:00
James Zhu
9fc9c9b83a drm/amdgpu/vcn:Update SPG mode UVD status clear
Update Static Power Gate mode UVD status clear

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:59 -05:00
James Zhu
10b66b2c65 drm/amdgpu/vcn:Set VCPU busy after gate power during vcn SPG start
Set VCPU busy after gate power during vcn Static Power Gate start

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:52 -05:00
James Zhu
3d904ee4c3 drm/amdgpu/vcn:Apply new UMC enable for VNC DPG mode
Apply new UMC enable for VNC Dynamic Power Gate mode

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:44 -05:00
James Zhu
ad7187bfe1 drm/amdgpu/vcn:Remove SPG mode unused steps during vcn start
Remove Sitatic Power Gate mode unused steps during vcn start

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:37 -05:00
James Zhu
3d022a01fe drm/amdgpu/vcn:Add SPG mode Register XX check
Add Static Power Gate mode Register XX check

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:30 -05:00
James Zhu
a1584957ff drm/amdgpu/vcn:Move SPG mode mc resume after MPC control
Move Static Power Gate mode mc resume after MPC control

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:23 -05:00
James Zhu
92bbdaeb91 drm/amdgpu/vcn:Update SPG mode VCN global tiling
Update Static Power Gate mode VCN global tiling

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:16 -05:00
James Zhu
298dc39a3a drm/amdgpu/vcn:Update SPG mode VCN memory control
Update Static Power Gate  mode VCN memory control

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:09 -05:00
James Zhu
f5c5451fef drm/amdgpu/vcn:Apply new UMC enable for VNC DPG mode start
Apply new UMC enable for VNC Dynamic Power Gate mode start

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:55:01 -05:00
James Zhu
fe146873f5 drm/amdgpu/vcn:Remove DPG mode unused steps during vcn start
Remove Dynamic Power Gate mode unused steps during VCN start

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:55 -05:00
James Zhu
368d0dd81a drm/amdgpu/vcn:Add DPG mode Register XX check
Add Dynamic Power Gate mode Register XX check

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:47 -05:00
James Zhu
abd2d47c51 drm/amdgpu/vcn:Update DPG mode VCN global tiling registers
Update Dynamic Power Gate mode VCN global tiling registers

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:40 -05:00
James Zhu
6747c2021c drm/amdgpu/vcn:Update DPG mode VCN memory control
Update Dynamic Power Gate mode VCN memory control

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:33 -05:00
James Zhu
cce9d55585 drm/amdgpu/vcn:Reduce unnecessary local variable
Reduce unnecessary local variable.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:25 -05:00
James Zhu
15296db706 drm/amdgpu/vcn:Add ring W/R PTR check for VCN DPG mode stop
Add ring write/read pointer check for VCN dynamic power gate mode
stop,to make sure that no job is left in ring before turn off DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:17 -05:00
James Zhu
5866fb929c drm/amdgpu/vcn:Update latest spg mode stop for VCN
Update latest static power gate mode stop function for VCN

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:09 -05:00
James Zhu
5327f025dc drm/amdgpu/vcn:Update latest UVD_MPC register for VCN
Update latest UVD_MPC register for VCN. Use defined
macro to replace value for readability.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:54:02 -05:00
James Zhu
b53d3049d2 drm/amdgpu/vcn:Add new register offset/mask for VCN
Add new register offset/mask for VCN to support
latest VCN implementation.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:53:52 -05:00
hersen wu
8c6259beda drm/amdgpu/display: dm/amdgpu: make dp phy debugfs for eDP
[WHY] dp debugfs file does not exist for eDP under
      /sys/kernel/debug/dri/0/eDP-1. the root is phy debugfs
      is created for dp connector only.
[HOW] for eDP connector, create phy debugfs too.

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:53:04 -05:00
Emily Deng
8bda1013dd drm/amdgpu: Set the default value about gds vmid0 size
For sriov, when first run windows guest, then run linux guest, the gds
vmid0 size will be reset to 0 by windows guest. So if the value has been
reset to 0, then set the value to the default value in linux guest.

v2:
Fixed value instead of reading mmGDS_VMID0_SIZE.

v3:
Set the default value of the switch.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:52:49 -05:00
Christian König
0efd2d2f68 drm/sched: fix timeout handling v2
We need to make sure that we don't race between job completion and
timeout.

v2: put revert label after calling the handling manually

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:52:32 -05:00
Christian König
b981c86f03 drm/sched: add drm_sched_start_timeout helper
Cleanup starting the timeout a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:52:21 -05:00
Evan Quan
7a862028b9 drm/amd/powerplay: hint when power profile setting is not supported
Give user some hints when the power profile setting is not supported.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:22:16 -05:00
Evan Quan
73d0a44669 drm/amd/powerplay: translate power_profile mode to pplib workload type
Correctly translate the power profile specified by user to workload
type accepted by SMU fw.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-10-12 12:22:16 -05:00
Greg Kroah-Hartman
62d2e531d7 Merge tag 'drm-fixes-2018-10-12-1' of git://anongit.freedesktop.org/drm/drm
Dave writes:
  "drm fixes for 4.19-rc8

   single nouveau runtime reference and mst change"

* tag 'drm-fixes-2018-10-12-1' of git://anongit.freedesktop.org/drm/drm:
  drm/nouveau/drm/nouveau: Grab runtime PM ref in nv50_mstc_detect()
2018-10-12 12:53:48 +02:00
Paulo Zanoni
b9117149fe drm/i915: promote ddb update message to DRM_DEBUG_KMS
This message is currently marked as DRM_DEBUG_ATOMIC. I would like it
to be DRM_DEBUG_KMS since it is more KMS than atomic, and this will
also make the message appear in the CI logs, which may or may not help
us with some FIFO underrun bugs.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-7-paulo.r.zanoni@intel.com
2018-10-11 14:23:04 -07:00
Paulo Zanoni
9e44b180f8 drm/i915: don't write PLANE_BUF_CFG twice every time
We were writing to PLANE_BUF_CFG(pipe, plane_id) twice for every
platform, and we were even using different values on the gen10- planar
case. The first write is useless since it just gets replaced with the
next one, so kill it.

There's a lot to improve in the DDB code, but let's start by avoiding
the double write.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-6-paulo.r.zanoni@intel.com
2018-10-11 14:23:04 -07:00
Paulo Zanoni
cbacc79db6 drm/i915: transition WMs ask for Selected Result Blocks
The transition watermarks ask for Selected Result Blocks (the real
value), not Result Blocks (the integer value). Given how ceilings are
applied in both the non-transition and the transition watermarks
calculations, we can get away with assuming that Selected Result
Blocks is actually Result Blocks minus 1 without any rounding errors.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-5-paulo.r.zanoni@intel.com
2018-10-11 14:23:04 -07:00
Paulo Zanoni
077b5820af drm/i915: fix the watermark result selection on glk/gen10+
On these platforms we're supposed to unconditonally pick the method 2
result instead of the minimum.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-4-paulo.r.zanoni@intel.com
2018-10-11 14:23:03 -07:00
Paulo Zanoni
91961a850d drm/i915: fix the transition minimums for gen9+ watermarks
The transition minimum is 14 blocks for gens 9 and 10, and 4 blocks
for gen 11. This minimum value is supposed to be added to the
configurable trans_amount. This matches both BSpec and additional
information provided by our HW engineers.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181004231600.14101-3-paulo.r.zanoni@intel.com
2018-10-11 14:23:03 -07:00
Paulo Zanoni
ef51e0a3eb drm/i915: DRM_FORMAT_C8 is not possible with Yf tiling
Function intel_framebuffer_init() checks for the possibilities during
framebuffer creation (addfb ioctl time). It is missing the fact that
the indexed format is not supported with Yf tiling.

It is worth noticing that skl_plane_format_mod_supported() correctly
handles for the C8/Yf combination, but this function runs during
modeset time, so we only reject the combination later.

Ville recently proposed a new IGT test that only uses addfb to assert
supported formats, so that IGT was failing. Add the check so we get
green squares right from the start after Ville merges his test.

Also drive-by fix the missing /* fall through */ in the chunk we
modified by just turning it into a "break;" since IMHO breaks are
easier to read than fall-throughs.

BSpec: 18565
Testcase: igt/kms_addfb_basic/expected-formats (not merged yet)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180925001913.29460-1-paulo.r.zanoni@intel.com
2018-10-11 14:23:02 -07:00
Michal Wajdeczko
645ff9e371 drm/i915: Inject load failure inside intel_engines_init_mmio
We need extra load failure point to better test error path in
i915_driver_init_mmio.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011130008.24640-2-michal.wajdeczko@intel.com
2018-10-11 21:06:52 +01:00
Michal Wajdeczko
c5b083a1a1 drm/i915: Fix i915_driver_init_mmio error path
In case of the error we missed to call i915_mmio_cleanup
that matches earlier call to i915_mmio_setup.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011130008.24640-1-michal.wajdeczko@intel.com
2018-10-11 21:06:42 +01:00
José Roberto de Souza
c0c46ca461 drm/i915/aml: Add new Amber Lake PCI ID
This new AML PCI ID uses the same gen graphics as Coffe Lake not a
Kaby Lake one like the other AMLs.

So to make it more explicit renaming INTEL_AML_GT2_IDS to
INTEL_AML_KBL_GT2_IDS and naming this id as INTEL_AML_CFL_GT2_IDS.

v2:
- missed add new AML macro to INTEL_CFL_IDS()
- added derivated platform initials to AML macros

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927010650.22731-1-jose.souza@intel.com
2018-10-11 10:59:34 -07:00
Greg Kroah-Hartman
834d3cd294 Merge tag 'alloc-args-v4.19-rc8' of https://git.kernel.org/pub/scm/linux/kernel/git/kees/linux
Kees writes:
  "Fix open-coded multiplication arguments to allocators

   - Fixes several new open-coded multiplications added in the 4.19
     merge window."

* tag 'alloc-args-v4.19-rc8' of https://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
  treewide: Replace more open-coded allocation size multiplications
2018-10-11 19:10:30 +02:00
Kees Cook
0bb95f80a3 Makefile: Globally enable VLA warning
Now that Variable Length Arrays (VLAs) have been entirely removed[1]
from the kernel, enable the VLA warning globally. The only exceptions
to this are the KASan an UBSan tests which are explicitly checking that
VLAs trigger their respective tests.

[1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: David Airlie <airlied@linux.ie>
Cc: linux-kbuild@vger.kernel.org
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Kees Cook <keescook@chromium.org>
2018-10-11 08:17:50 -07:00
Chris Wilson
0b4bf7ca9b drm/i915/selftests: Disable shrinker across mmap-exhaustion
For mmap-exhaustion, we deliberately put the system under a large amount
of pressure to ensure that we are able to reap mmap-offsets from dead
objects. If background activity does that reaping for us, that defeats
the purpose of the test and in some cases will fail our sanity checks
(because of the fake activity we use to prevent the idle worker).

Fixes: 932cac10c8 ("drm/i915/selftests: Prevent background reaping of acti
ve objects")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011103748.18387-1-chris@chris-wilson.co.uk
2018-10-11 16:04:09 +01:00
José Roberto de Souza
7323001549 drm: Do not call drm_dp_cec_set_edid() while registering DP connectors
drm_dp_cec_register_connector() is called when registering each DP
connector in DRM, while sounds a good idea register CEC adapters as
earlier as possible, it causes some driver initialization delay
trying to do DPCD transactions in disconnected connectors.

This change will cause no regressions as drm_dp_cec_set_edid() will
still be called in further detection of connected connectors with a
valid edid parameter.

This change reduced the module load of i915 by average 0.5sec in a
machine with just one DP port disconnected while reducing more than
3sec in a machine with 4 DP ports disconnected.

Cc: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011004439.4482-1-jose.souza@intel.com
2018-10-11 10:52:35 +02:00
YueHaibing
2a7be4b4a9 drm: Use PTR_ERR_OR_ZERO in drm_fb_cma_fbdev_init()
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1539176563-144779-1-git-send-email-yuehaibing@huawei.com
2018-10-11 10:46:40 +02:00
Dave Airlie
ca4b869240 Merge branch 'drm-next-4.20' of git://people.freedesktop.org/~agd5f/linux into drm-next
Add a new list.h helper for doing bulk updates.  Used by ttm.
- Fixes for display underflow on VI APUs at 4K with UVD running
- Endian fixes for powerplay on vega
- DC fixes for interlaced video
- Vega20 powerplay fixes
- RV/RV2/PCO powerplay fixes
- Fix for spurious ACPI events on HG laptops
- Fix a memory leak in DC on driver unload
- Fixes for manual fan control mode switching
- Suspend/resume robustness fixes
- Fix display handling on RV2
- VCN fixes for DPG on PCO
- Misc code cleanups and warning fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181011014739.3117-1-alexander.deucher@amd.com
2018-10-11 14:53:45 +10:00