Commit Graph

49982 Commits

Author SHA1 Message Date
Russell King
3382a6b999 drm/armada: move armada_drm_mode_config_funcs to armada_drv.c
Move the armada_drm_mode_config_funcs to armada_drv.c, since this now
has less to do with FBs than it does with general mode configuration.
In doing so, we need to make armada_fb_create() visible to armada_drv.c,
which reveals a function name clash with armada_fbdev.c.  Rename the
version in armada_fbdev.c.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
c29277d4e5 drm/armada: add plane colorspace properties
Use the DRM standard plane properties for specifying the YUV
colour encoding parameter.  Our colour range is fixed at limited
range.

Since we are transitioning to atomic modeset, we need to explicitly
add handling of these properties to our atomic_set_property() method,
but once the transition is complete, these will be removed.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
240cf2b58e drm/armada: remove crtc YUV colourspace properties
Remove the unused CRTC colourspace properties - userspace does not make
use of these.  In any case, these are not a property of the CRTC, since
they demonstrably only affect the video (overlay) plane, irrespective
of the format of the graphics (primary) plane.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
c96103b6c4 drm/armada: move colorkey properties into overlay plane state
Move the overlay plane colorkey properties into the plane state,
keeping the existing driver behaviour to avoid breaking userspace.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
61ba252705 drm/armada: move CBSH properties into overlay plane state
Move the contrast, brightness, and saturation properties to the overlay
plane state structure, and call our overlay commit function to update
the hardware via the planes atomic_update() method.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
63b93c0834 drm/armada: move plane works to overlay
Only overlay makes use of these now, so move these to the overlay code.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
d40af7b1ae drm/armada: move primary plane to separate file
Split out the primary plane support; this is now entirely separate from
the CRTC support.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
3acea7b9b6 drm/armada: use old_state for update tracking in atomic_update()
Rather than tracking the register state, we can now check the previous
state and decide which registers need updating from that since the old
plane state indicates the previous state which was programmed into the
hardware.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
9c41467c9a drm/armada: remove temporary crtc state
Now that we have the CRTC using the atomic modeset transitional helper,
there is no need to build a temporary crtc state anymore - we can use
the CRTC atomic state directly.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
47dc413b00 drm/armada: convert overlay plane to atomic state
The overlay plane support updates asynchronously to the request, but the
drm_plane_helper_update() transitional helper waits for a vblank event
before releasing the framebuffer.  Using the transitional helper would
make the call block, which would introduce a performance regression.

Convert the overlay plane update to use the atomic state structures and
methods for the plane, but implement our own legacy update method
rather than the transitional helper.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
de503ddff8 drm/armada: convert page_flip to use primary plane atomic_update()
page_flip requests happen asynchronously, so we can't wait on the
vblank event before returning to userspace, as the transitional plane
update helper would do.  Craft our own implementation that keeps the
asynchronous behaviour of this request, while making use of the atomic
infrastructure for the primary plane update.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
c36045e17a drm/armada: convert primary plane to atomic state
Convert the primary plane as a whole to use its atomic state and the
transitional helpers.  The CRTC is also switched to use the transitional
helpers for mode_set() and mode_set_base().

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
80c63aee81 drm/armada: reset all atomic state during driver initialisation
Reset the atomic state of any converted components during driver
initialisation to ensure that we have the atomic state initialised for
any component converted to atomic modeset.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
ecf25d2380 drm/armada: merge armada_drm_gra_plane_regs() into only caller
armada_drm_gra_plane_regs() is now only ever called from within
armada_drm_primary_update_state(), so merge it into this function.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
cfd1b63af7 drm/armada: use core of primary update_plane for mode set
Use the core of the update_plane method to configure the primary plane
within mode_set() rather than duplicating this code.  This moves us
closer to the same code structure that the atomic modeset transitional
helpers will use.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
f9a13bb3ba drm/armada: move mode set vblank handling and disable/enable
Move the mode set vblank handling and controller enable/disable to the
prepare() and commit() callbacks.  This will be needed when we move to
mode_set_nofb() as we should not enable the controller without the
plane coordinates and location having been properly updated.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
0239520e02 drm/armada: add rectangle helpers
Add helpers to convert rectangle width/height and x/y to register
values.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Russell King
1729f56010 drm/armada: clean up armada_drm_crtc_page_flip()
drm_mode_page_flip_ioctl() already takes care of checking the
framebuffer format, and also assigns primary->fb after a successful
call to this handler.  These are both redundant, and can be removed.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:34 +01:00
Souptick Joarder
7794ec7774 drm/armada: Adding new typedef vm_fault_t
Use new return type vm_fault_t for fault handler in struct
vm_operations_struct. For now, this is just documenting that the
function returns a VM_FAULT value rather than an errno. Once all
instances are converted, vm_fault_t will become a distinct type.

commit 1c8f422059 ("mm: change return type to vm_fault_t")

Previously vm_insert_pfn() returns err which driver mapped into
VM_FAULT_* type. The new function vmf_insert_pfn() will replace this
inefficiency by returning VM_FAULT_* type.

Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com>
Reviewed-by: Matthew Wilcox <mawilcox@microsoft.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:31 +01:00
Thomas Zimmermann
830aadceae drm/armada: Replace drm_dev_unref with drm_dev_put
This patch unifies the naming of DRM functions for reference counting
of struct drm_device. The resulting code is more aligned with the rest
of the Linux kernel interfaces.

Signed-off-by: Thomas Zimmermann <tdz@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-07-30 11:52:31 +01:00
Chris Wilson
f6844a85e0 drm/i915/selftests: Replace opencoded clflush with drm_clflush_virt_range
We occasionally see that the clflush prior to a read of GPU data is
returning stale data, reminiscent of much earlier bugs fixed by adding a
second clflush for serialisation. As drm_clflush_virt_range() already
supplies the workaround, use it rather than open code the clflush
instruction.

References: 396f5d62d1 ("drm: Restore double clflush on the last partial cacheline")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180730075351.15569-3-chris@chris-wilson.co.uk
2018-07-30 10:33:21 +01:00
Chris Wilson
39f3be162c drm/i915: Kick waiters on resetting legacy rings
For reasons unknown, interrupts following a reset do not arrive, but
this can be papered over by kicking any waiter and peeking at the
breadcrumbs following the reset.

Testcase: igt/gem_eio/reset-stress
References: https://bugs.freedesktop.org/show_bug.cgi?id=105957
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180730075351.15569-2-chris@chris-wilson.co.uk
2018-07-30 10:32:07 +01:00
Chris Wilson
86c1c87d0e drm/i915: Downgrade Gen9 Plane WM latency error
According to intel_read_wm_latency() it is perfectly legal for one WM
and all subsequent levels to be 0 (and the deeper powersaving states
disabled), so don't shout *ERROR*, over and over again.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180726161527.10516-1-chris@chris-wilson.co.uk
2018-07-30 08:55:27 +01:00
Dave Airlie
3fce461827 BackMerge v4.18-rc7 into drm-next
rmk requested this for armada and I think we've had a few
conflicts build up.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-07-30 10:39:22 +10:00
Rodrigo Siqueira
2ead1be54b drm/vkms: Fix connector leak at the module removal
Currently, vkms shows an error message if the following steps occur: (1)
load vkms, (2) perform any specific operation in the vkms (e.g., run an
IGT test), and (3) unload the module. The following error message
emerges:

[drm:drm_mode_config_cleanup [drm]] *ERROR* connector Virtual-1 leaked!

This commit fixes this error by calling drm_atomic_helper_shutdown()
before drm_mode_config_cleanup, which turns off the whole display
pipeline and remove a reference related to any connector.

Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com>
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180719004045.hzepp565x5lfco3c@smtp.gmail.com
2018-07-28 16:09:39 -03:00
Hans Verkuil
ea5569ecd6 drm_dp_cec.c: fix formatting typo: %pdH -> %phD
This caused a kernel oops since %pdH interpreted the pointer
as a struct file.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f3720ddf-ec0f-cd22-46b6-720a5e2098f2@xs4all.nl
2018-07-28 15:50:40 -03:00
Anusha Srivatsa
6f211ed434 drm/i915/icl: Set TBT IO in Aux transaction
For a TBT sequence, we need to set the IO type to TBT
in  DDI_AUX_CTL.

v2: Avoid duplications.(Paulo)

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1532648115-29795-2-git-send-email-anusha.srivatsa@intel.com
2018-07-27 16:19:39 -07:00
Anusha Srivatsa
2b7edeb008 drm/i915/icl: Add TBT checks for PLL calculations
Add missing TBT check in the Pll calculation.

v2: do not use a auxiliary function to check if status is
TBT or not. (Paulo)

v3: Code style changes. (Paulo)

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1532648115-29795-1-git-send-email-anusha.srivatsa@intel.com
2018-07-27 16:18:31 -07:00
Paulo Zanoni
f00ca81510 drm/i915: inline skl_copy_ddb_for_pipe() to its only caller
While things may have been different before, right now the function is
very simple and has a single caller. IMHO any possible benefits from
an abstraction here are gone and not worth the price of the current
indirection while reading the code.

Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180607230700.28359-1-paulo.r.zanoni@intel.com
2018-07-27 15:53:02 -07:00
Paulo Zanoni
c50dfe79ec drm/i915/icl: don't set CNL_DDI_CLOCK_REG_ACCESS_ON anymore
The new recommendation from the spec is to simply not set this bit
anymore. Not setting the bit would prevent some hangs that our driver
manages to avoid since commit c8af5274c3 ("drm/i915: enable the
pipe/transcoder/planes later on HSW+"), and the theoretical downside
of not setting the bit doesn't seem realistic according to the HW
team. Let's follow their recommendation.

BSpec: 20233
References: commit c8af5274c3 ("drm/i915: enable the
 pipe/transcoder/planes later on HSW+")
Cc: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180726001229.13791-1-paulo.r.zanoni@intel.com
2018-07-27 15:52:33 -07:00
Huang Rui
2e603d0429 drm/amdgpu: clean up the superfluous space and align the comment text for amdgpu_ttm
This patch cleans up spaces and align the text to refine the comment for
amdgpu_ttm.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 15:00:38 -05:00
Junwei Zhang
204029e197 drm/amdgpu: correct evict flag for bo move
pass the evict flag instead of hard code

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 15:00:29 -05:00
Bas Nieuwenhuizen
610b399f1f drm/ttm: Merge hugepage attr changes in ttm_dma_page_put. (v2)
Every set_pages_array_wb call resulted in cross-core
interrupts and TLB flushes. Merge more of them for
less overhead.

This reduces the time needed to free a 1.6 GiB GTT WC
buffer as part of Vulkan CTS from  ~2 sec to < 0.25 sec.
(Allocation still takes more than 2 sec though)

(v2): use set_pages_wb instead of set_memory_wb.

Signed-off-by: Bas Nieuwenhuizen <basni@chromium.org>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 15:00:22 -05:00
Huang Rui
d55f9b8742 drm/ttm: clean up non-x86 definitions on ttm_page_alloc
All non-x86 definitions are moved to ttm_set_memory header, so remove it from
ttm_page_alloc.c.

Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Bas Nieuwenhuizen <basni@chromium.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 15:00:14 -05:00
Huang Rui
c7bb1e57e2 drm/ttm: clean up non-x86 definitions on ttm_page_alloc_dma
All non-x86 definitions are moved to ttm_set_memory header, so remove it from
ttm_page_alloc_dma.c.

Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Bas Nieuwenhuizen <basni@chromium.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 15:00:08 -05:00
Chris Wilson
5503cb0dec drm/i915: Drop unneed i915 parameter from intel_ring_pin()
As we now have a ring->vma available, we can just lookup our i915
pointer from inside the vm, and so not require the unsightly parameter.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727155501.18963-1-chris@chris-wilson.co.uk
2018-07-27 18:22:08 +01:00
Jakub Bartmiński
905febf592 drm/i915: Add a fault injection point to WOPCM init
Add a fault injection point in the WOPCM initialization path.

v4:
Move the injection inside the WOPCM init function.

Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727141148.30874-5-jakub.bartminski@intel.com
2018-07-27 16:07:45 +01:00
Jakub Bartmiński
496bcce3c9 drm/i915: Remove unnecessary ggtt_offset_bias from i915_gem_context
Since ggtt_offset_bias is now stored in ggtt.pin_bias, it is duplicated
inside i915_gem_context, and can instead be accessed directly from ggtt.

v3:
Added a helper function to retrieve the ggtt.pin_bias from the vma.

v4:
Moved the helper function to the previous patch in the series.
Dropped the bias from intel_ring_pin. This introduces a slight functional
change since we are always pinning the ring a bit higher if GuC is present
even though we don't really need to.

v8:
Fixed patch not applying on the most recent upstream.

Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727141148.30874-4-jakub.bartminski@intel.com
2018-07-27 16:07:37 +01:00
Jakub Bartmiński
dd18cedfa3 drm/i915/guc: Move the pin bias value from GuC to GGTT
Removing the pin bias from GuC allows us to not check for GuC every time
we pin a context, which fixes the assertion error on unresolved GuC
platform default in mock contexts selftest.

It also seems that we were using uninitialized WOPCM variables when
setting the GuC pin bias. The pin bias has to be set after the WOPCM,
but before the call to i915_gem_contexts_init where the first contexts
are pinned.

v2:
This also makes it so that there's no need to set GuC variables from
within the WOPCM init function or to move the WOPCM init, while keeping
the correct initialization order. Also for mock tests the pin bias is
left at 0 and we make sure that the pin bias with GuC will not be
smaller than without GuC.

v3:
Avoid unused i915 in intel_guc_ggtt_offset if debug is disabled.

v4:
Squash with WOPCM init reordering.
Moved the i915_ggtt_pin_bias helper to this patch, and made some
functions use it instead of directly dereferencing i915->ggtt.

v5:
Since we now don't use wopcm.guc.base for the pin bias there's no need to
validate it. It also has already been verified in WOPCM init.

v6:
Deleted the now unnecessarily introduced includes from previous versions.
Dropped naming changes from dev_priv to i915 for better patch readability.

v7:
Changed some comments to make more sense in the context they're in.

v8:
Moved and renamed the function which now returns the wopcm.guc.size to
intel_guc.c:intel_guc_reserved_gtt_size to avoid any possible confusion
with the pin_bias in ggtt, which should be used for pinning.
Fixed patch not applying or the most recent upstream.

Fixes: f7dc0157e4 ("drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc specific init")
Testcase: igt/drv_selftest/mock_contexts #GuC
Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727141148.30874-3-jakub.bartminski@intel.com
2018-07-27 16:03:41 +01:00
Jakub Bartmiński
b6445e1779 drm/i915/guc: Do not partition WOPCM if GuC is not used
There seems to be no reason for doing extra work on WOPCM partitioning
in the case GuC is not used, as the partitioning will not be used by the
intel_wopcm_init_hw function anyway.

Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727141148.30874-2-jakub.bartminski@intel.com
2018-07-27 16:03:40 +01:00
Jakub Bartmiński
9936ef55f2 drm/i915/guc: Avoid wasting memory on incorrect GuC pin bias
It would appear that the calculated GuC pin bias was larger than it should
be, as the GuC address space does NOT contain the "HW contexts RSVD" part
of the WOPCM. Thus, the GuC pin bias is simply the GuC WOPCM size.

v5:
Clarify the diagram to better represent the GuC address space.
Since we now don't use guc.base for the pin bias there's no need to
validate it. It also has already been verified in WOPCM init.

Bspec: 1180

Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180727141148.30874-1-jakub.bartminski@intel.com
2018-07-27 16:03:39 +01:00
Alex Deucher
f1e582ebfd drm/amdgpu: implement harvesting support for UVD 7.2 (v3)
Properly handle cases where one or more instance of the IP
block may be harvested.

v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c
v3: rebase on Christian's UVD changes, drop unused var

Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:44 -05:00
Harry Wentland
d04cc604a6 drm/amd: Add missing fields in atom_integrated_system_info_v1_11
This structure needs to align with structure in atomfirmware table.
Update it.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:43 -05:00
Harry Wentland
116f451c90 drm/amd/display: DC 3.1.59
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:43 -05:00
Anthony Koo
9907704174 drm/amd/display: Prevent PSR from being enabled if initialization fails
[Why]
PSR_SET command is sent to the microcontroller in order to initialize
parameters needed for PSR feature, such as telling the microcontroller
which pipe is driving the PSR supported panel. When this command is
skipped or fails, the microcontroller may program the wrong thing if
driver tries to enable PSR.

[How]
If PSR_SET fails, do not set psr_enable flag to indicate the feature is
not yet initialized.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:43 -05:00
Jerry (Fangzhi) Zuo
f358b39d18 drm/amd/display: Fix Vega10 black screen after mode change
[Why]
The sequence is slightly changed when bring .set_bandwidth out
from the end of programming backend to the end of programming
surface. Vega10 doesn't like to get clocks updated if
stream_count is zero in the current context (Atomic Reset).

[How]
Do not update clocks if no stream is showing up in the context.

Fixes 1b2b130192 "dc: Remove 300Mhz minimum disp clk limit."

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:42 -05:00
Bhawanpreet Lakha
65c78961b3 drm/amd/display: flatten aux_engine and engine
[Why]
engine and aux_engine are unnecessary layers we want to remove this
layer.

[How]
flatten engine and aux engine structs into one struct called
aux_engine and remove all references to the engine struct.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:42 -05:00
Bhawanpreet Lakha
824474ba38 drm/amd/display: Retry link training again
[Why]
Some receivers seem to fail the first link training but are good on
subsequent tries. We want to retry link training again. This fixes
HTC vive pro not lighting up after being disabled.

[How]
Check if the link training passed without fall back if this is not
the case then we retry link training.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:42 -05:00
Christian König
66c28d6df2 drm/amdgpu: patch the IBs for the second UVD instance v2
Patch the IBs for the second UVD instance so that userspace don't need
to care about the instance they submit to.

v2: use direct IB patching

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-and-tested-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:41 -05:00
Christian König
9d248517d4 drm/amdgpu: add support for inplace IB patching for MM engines v2
We are going to need that for the second UVD instance on Vega20.

v2: rename to patch_cs_in_place

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-tested-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-27 09:07:41 -05:00