In max732x_probe() driver allocates dummy I2C device (if number of ports
is greater than 8) with i2c_new_dummy() but it does not check the return
value of this call.
In case of error (i2c_new_device(): memory allocation failure or I2C
address cannot be used) this function returns NULL which is later
dereferenced by i2c_smbus_read_byte() (called from max732x_readb()).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In max732x_probe() driver allocates dummy I2C device (if number of ports
is greater than 8) however it is not unregistered if probe fails later.
Fix the leak by unregistering dummy I2C device if it was allocated.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The driver missed an of_xlate function to translate gpio numbers
as found in the DT to the correct chip and number.
While there I've set #gpio_cells to a fixed value of 2.
I've used gpio-pxa.c as template for those changes and tested my changes
successfully on a da850 board using entries for gpio-leds in a DT. So I didn't
reinvent the wheel but just copied and tested stuff.
Thanks to Grygorii Strashko for the hint to the existing code in gpio-pxa.
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Replace commas with semicolons between irqchip callback initialisation
statements in tz1090_gpio_bank_probe. The commas appear to be a subtle
remnant of when the irqchips were statically initialised.
Thanks to Thomas Gleixner for spotting it while whipping up a coccinelle
script.
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-metag@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
It is currently debated where the functions to lock a certain
GPIO line as used for IRQs should be called. Delete all
misleading documentation.
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The following build warning is generated when building multi_v7_defconfig with
LPAE option selected:
drivers/gpio/gpio-pl061.c:358:2: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'resource_size_t' [-Wformat=]
Fix it by using %pa to print 'resource_size_t'.
Reported-by: Olof's autobuilder <build@lixom.net>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
fix build error with this message:
kernel/irq/Kconfig:41:error: recursive dependency detected!
kernel/irq/Kconfig:41: symbol GENERIC_IRQ_CHIP is selected by GPIO_DWAPB
drivers/gpio/Kconfig:131: symbol GPIO_DWAPB depends on IRQ_DOMAIN
kernel/irq/Kconfig:46: symbol IRQ_DOMAIN is selected by GENERIC_IRQ_CHIP
Signed-off-by: Alan Tull <atull@altera.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Synopsys DesignWare block is used in some ARM devices (picoxcell)
and can be configured to provide multiple banks of GPIO pins.
v12: - Add irq_startup/shutdown
- do irq_create_mapping() in probe, irq_find_mapping() in to_irq()
- Adjust mappings to show support for 1 gpio per port.
- gpio-cells = <1>
v11: - Use NULL when checking existence of 'interrupts' property
- Bindings descriptions cleanup
v10: - in documentation nr-gpio -> nr-gpios
v9: - cleanup in dt bindings doc
- use of_get_child_count()
v8: - remove socfpga.dtsi changes
- minor cleanup in devicetree documentation
v7: - use irq_generic_chip
- support one irq per gpio line or one irq for many
- s/bank/port/ and other cleanup
v6: - (atull) squash the set of patches
- use linear irq domain
- build fixes. Original driver was reviewed on v3.2.
- Fix setting irq edge type for 'rising' and 'both'.
- Support as a loadable module.
- Use bgpio_chip's spinlock during register access.
- Clean up register names to match spec
- s/bank/port/ because register names use the word 'port'
- s/nr-gpio/nr-gpios/
- don't get/put the of_node
- remove signoffs/acked-by's because of changes
- other cleanup
v5: - handle sparse bank population correctly
v3: - depend on rather than select IRQ_DOMAIN
- split IRQ support into a separate patch
v2: - use Rob Herring's irqdomain in generic irq chip patches
- use reg property to indicate bank index
- support irqs on both edges based on LinusW's u300 driver
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Alan Tull <atull@altera.com>
Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver supports the GPIO controller found in LSI ZEVIO SoCs.
It has been successfully tested on a TI nspire CX calculator.
Signed-off-by: Fabian Vogt <fabian@ritter-vogt.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Merge "qcom driver changes for v3.15" from Kumar Gala:
We've split Qualcomm MSM support into legacy and multiplatform. These
drivers are only relevant on the multiplatform supported SoCs so switch the
Kconfig depends to ARCH_QCOM.
* tag 'qcom-drivers-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
gpio: msm: switch Kconfig to ARCH_QCOM depends
hwrng: msm: switch Kconfig to ARCH_QCOM depends
power: reset: msm - switch Kconfig to ARCH_QCOM depends
drm/msm: drop ARCH_MSM Kconfig depend
tty: serial: msm: Enable building msm_serial for ARCH_QCOM
We've split Qualcomm MSM support into legacy and multiplatform. The gpio
msm-v2 driver is only relevant on the multiplatform supported SoCs so
switch the Kconfig depends to ARCH_QCOM.
CC: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Variable "offset" cannot be negative, so no need to check if it
greater than zero or equal.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Variable 'irq' is declared as unsigned and then used to store
negative return values from irq_alloc_descs() such as -EINVAL.
This patch fix this by declaring the variable as a signed.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use devm_ioremap_resource() in order to make the code simpler,
and remove redundant return value check of platform_get_resource()
because the value is checked by devm_ioremap_resource().
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
If no device tree node existed for a device when CONFIG_OF_GPIO was
defined, then gpio_base would not default to -1.
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pca953x driver supports tca6424 (24-bit) and pca9505 (40-bit)
devices. They were the only supported devices not mentioned in the
Kconfig help.
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Acked-by: Graeme Smecher <gsmecher@threespeedlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As discussed here: http://ez.analog.com/message/35852,
the 5587 revC and 5588 revB spec sheets contain a mistake
in the GPIO_DAT_STATx register description.
According to R.Shnell at ADI, as well as my own
observations, it should read:
"GPIO data status (shows GPIO state when read for inputs)".
This commit changes the get value function accordingly.
Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Acked-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some drivers dealing with a gpio_chip might need to act on its
descriptors directly; one example is pinctrl drivers that need to lock a
GPIO for being used as IRQ using gpiod_lock_as_irq().
This patch exports a gpiochip_get_desc() function that returns the
GPIO descriptor at the requested index. It also sweeps the
gpio_to_chip() function out of the consumer interface since any holder
of a gpio_chip reference can manipulate its GPIOs way beyond what a
consumer should be allowed to do.
As a result, gpio_chip is not visible anymore to simple GPIO consumers.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On currently supported SoCs, the GPIO block used on Marvell EBU SoCs
is always connected to the Marvell MPIC. However, we are going to
introduce the support for newer Marvell EBU SoCs that use the
Cortex-A9 core, and therefore use the GIC as their main interrupt
controller, to which the GPIO block controlled by the gpio-mvebu
driver is connected.
The GIC interrupt controller driver uses the fasteoi flow handler. In
order to ensure that the eoi hook of the GIC driver gets called, the
GPIO driver should call chained_irq_enter() and chained_irq_exit() in
its handler. Without this, the first GPIO interrupt locks up the
system because it doesn't get acked at the GIC level.
This change is similar to for example commit
0d978eb734 ("gpio: davinci: use
chained_irq_enter/chained_irq_exit API").
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch allows GPIO driver to cache GPIO_LVL output registers. The aim is to
support chipsets on which GPIO_LVL value can't be read for output pins.
Caching output levels implies the first output values reading as 0. The driver
so can't be aware of set values GPIOs by bootloader or BIOS.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch introduces regs and reglen pointers which allow a chipset to have
register addresses differing from ICH ones.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch allows gpio_ich driver to be aware of non blink capable chipsets.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The documentation was not clear about whether
gpio_direction_output should take a logical value or the physical
level on the output line, i.e. whether the ACTIVE_LOW status
would be taken into account.
This converts gpiod_direction_output to use the logical level
and adds a new gpiod_direction_output_raw for the raw value.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The generic GPIO would return 0 for low generic GPIO, and
something != 0 for high GPIO. Let's make this sane by clamping
the returned value to [0,1].
Reported-by: Evgeny Boger <boger@contactless.ru>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add missing .owner of struct gpio_chip. This prevents the
module from being removed from underneath its users.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
commit f1f70479e9 "gpio: pl061: support irqdomain" drops the support of
irq generic chip and use irqdomain instead. Thus fixes the dependency by
selecting IRQ_DOMAIN rather than GENERIC_IRQ_CHIP.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When registering more than one platform device, it is
useful to set the gpio chip label in the platform data.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch removes some inconsistencies caused by the use of "int gpio"
in some parts of the code and "unsigned gpio" in others.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
PTR_RET is deprecated. Use PTR_ERR_OR_ZERO instead. While at it
also include missing err.h header.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rather than unlock/re-lock for every write access, unlock a GPIO when
it is requested and re-lock it when it is freed. As a result, the GPIO
helper functions no longer have to deal with unlocking and re-locking
the register.
In addition, only unlock a specific GPIO rather than unlocking the
entire GPIO bank as before.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The GPIO_CONTROL macro returns the control register offset when given a
GPIO number.
Update the argument name in the macro to reflect that it takes in a
GPIO number and not a bank.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
gpio-tb10x driver uses generic irq chip APIs (irq_alloc_domain_generic_chips,
irq_remove_generic_chip), so it needs to select GENERIC_IRQ_CHIP to avoid build
error.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
commit 55fe14ab87 "GPIO: clps711x: Rewrite driver for using generic GPIO code"
allows this driver to be built as a module.
Thus add module alias to support module auto loading.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Drop the " gpio" suffix after the pl061 irq_chip name:
this is only confusing: an irqchip name should be a single,
short, simple string that looks nice in /proc/interrupts.
Drop the nameing of each individual IRQ to "pl061" - I
think this naming function is for naming the IRQ line,
not for boilerplating them all with the name of the
parent controller, which is already known from the
.name field of the irq_chip.
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Deepak Sikri <deepak.sikri@st.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Refactor this function so that I can understand it, do one
big read/modify/write operation and have the bitmask in a
variable instead of recalculating it every time it's needed.
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Deepak Sikri <deepak.sikri@st.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
