Add the System Error Interrupt node, representing an IRQ chip which is
part of the GIC. The SEI node aggregates interrupts from the AP through
wired interrupts, and from the CPs through MSIs.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch adds CPU deep Idle and Cluster deep Idle states BUT it defines
the idle state for each cpu (defined under cpu-idle-states parameter)
only for the quad version therefore it does NOT activate CPU Idle
capability for the other version.
[gregory: extract from a larger patch]
Signed-off-by: orenbh <orenbh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Aligned with what we have done for the others nodes. It will also allow
to easily modify the cpu configuration at board (or sub-SoC) level.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Enable the 'dtbs' target for microblaze. As microblaze only has one dts
file, always enable it.
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Rob Herring <robh@kernel.org>
Using the common build support for built-in dtb files just requires
adding a .dtb.o target to obj-y.
The dtb now needs to be copied when unflattened because an init section
is used now.
Cc: Mark Salter <msalter@redhat.com>
Cc: Aurelien Jacquiot <jacquiot.aurelien@gmail.com>
Cc: linux-c6x-dev@linux-c6x.org
Signed-off-by: Rob Herring <robh@kernel.org>
nios2 has a 'dtbs' target, but nothing is added to 'dtb-*' targets and
no dtbs were getting built. This enables building all the dts files in
arch/nios2/boot/dts/ when COMPILE_TEST and OF_ALL_DTBS are enabled.
Cc: Ley Foon Tan <lftan@altera.com>
Cc: nios2-dev@lists.rocketboards.org
Signed-off-by: Rob Herring <robh@kernel.org>
Using the common build support for built-in dtb files just requires
adding a .dtb.o target to obj-y.
This has the side effect that CONFIG_NIOS2_DTB_SOURCE should now be just
the dts filename in arch/nios2/boot/dts/ directory. Before any path was
supported, but if you want to build in your dtb to the kernel, it should
be in the kernel tree.
Cc: Ley Foon Tan <lftan@altera.com>
Cc: nios2-dev@lists.rocketboards.org
Signed-off-by: Rob Herring <robh@kernel.org>
Align nios2 with other architectures which build the dtb files in the
same directory as the dts files. This is also in line with most other
build targets which are located in the same directory as the source.
This move will help enable the 'dtbs' target which builds all the dtbs
regardless of kernel config.
This transition could break some scripts if they expect dtb files in
the old location.
Cc: Ley Foon Tan <lftan@altera.com>
Cc: nios2-dev@lists.rocketboards.org
Signed-off-by: Rob Herring <robh@kernel.org>
Align powerpc with other architectures which build the dtb files in the
same directory as the dts files. This is also in line with most other
build targets which are located in the same directory as the source.
This move will help enable the 'dtbs' target which builds all the dtbs
regardless of kernel config.
This transition could break some scripts if they expect dtb files in the
old location.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Rob Herring <robh@kernel.org>
Commit 51c3c62b58 ("powerpc: Avoid code patching freed init
sections") accesses 'init_mem_is_free' flag too early, before the
kernel is relocated. This provokes early boot failure (before the
console is active).
As it is not necessary to do this verification that early, this
patch moves the test into patch_instruction() instead of
__patch_instruction().
This modification also has the advantage of avoiding unnecessary
remappings.
Fixes: 51c3c62b58 ("powerpc: Avoid code patching freed init sections")
Cc: stable@vger.kernel.org # 4.13+
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
We return H_TOO_HARD from TCE update handlers when we think that
the next handler (realmode -> virtual mode -> user mode) has a chance to
handle the request; H_HARDWARE/H_CLOSED otherwise.
This changes the handlers to return H_TOO_HARD on every error giving
the userspace an opportunity to handle any request or at least log
them all.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
The KVM TCE handlers are written in a way so they fail when either
something went horribly wrong or the userspace did some obvious mistake
such as passing a misaligned address.
We are going to enhance the TCE checker to fail on attempts to map bigger
IOMMU page than the underlying pinned memory so let's valitate TCE
beforehand.
This should cause no behavioral change.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Some commits we'd like to share between the powerpc and kvm-ppc tree for
next have dependencies on commits that went into 4.19 via the
kvm-ppc-fixes branch and weren't merged before 4.19-rc3, which is our
base commit.
So merge the kvm-ppc-fixes branch into topic/ppc-kvm.
mvebu soc for 4.20 (part 1)
- use dt_fixup to provide fallback for enable-method for Armada XP
- document the marvell,prestera compatible string
- update Thomas Petazzoni email in MAINTAINERS file
* tag 'mvebu-soc-4.20-1' of git://git.infradead.org/linux-mvebu:
dt-bindings: marvell,prestera: Add common compatible string
MAINTAINERS: replace free-electrons.com by bootlin.com for Thomas Petazzoni
ARM: mvebu: use dt_fixup to provide fallback for enable-method
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
i.MX SoC update for 4.20:
- Add ipg clock support in MMDC driver for registers access, so that
we will be safe even if the clock is not turned on by firmware.
- Register pm_power_off handler to provide power off support for iMX6
based boards with external PMIC.
- Add platform code support for i.MX 6ULZ SoC which is a derivative of
i.MX6ULL with some modules removed.
* tag 'imx-soc-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: add i.mx6ulz msl support
ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set
ARM: imx: add mmdc ipg clock operation for mmdc
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree changes for omap variants
This branch contains a series of improvments for omap3-gta04 phone,
and a series of clean-up for am335x to remove the deprecated phy_id
property.
The rest is to configure am57xx-idk boards for leds, load trigger,
and smps, am3517-evm audio configuration, beaglebone hdmi cec support,
coresight binding update, and fixes for i2c and spi warnings.
* tag 'omap-for-v4.20/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (70 commits)
ARM: dts: add omap3-gta04a5one to Makefile
ARM: dts: omap3-gta04: add pulldown/up settings for twl4030 gpio
ARM: dts: am335x-boneblack: add cec support
ARM: dts: am3517-evm: Add support for UI board and Audio
ARM: dts: gta04: add serial console wakeup irq
ARM: dts: am57xx-idk-common: Hook smps12 regulator as cpu vdd-supply
ARM: dts: omap: Update coresight bindings for hardware ports
ARM: dts: ti: Fix SPI and I2C bus warnings
ARM: dts: dra62x-j5eco-evm: get rid of phy_id property
ARM: dts: dm8148-t410: get rid of phy_id property
ARM: dts: dm8148-evm: get rid of phy_id property
ARM: dts: am57xx-cl-som-am57x: get rid of phy_id property
ARM: dts: am57xx-idk-common: get rid of phy_id property
ARM: dts: dra7-evm: get rid of phy_id property
ARM: dts: dra71-evm: get rid of phy_id property
ARM: dts: dra72-evm-revc: get rid of phy_id property
ARM: dts: dra72-evm: get rid of phy_id property
ARM: dts: dra76-evm: get rid of phy_id property
ARM: dts: am437x-cm-t43: get rid of phy_id property
ARM: dts: am437x-gp-evm: get rid of phy_id property
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mvebu dt for 4.20 (part 1)
- updates the armada-xp-98dx3236 SoC and related boards to use the new
style dts bindings for nand
- add db-88f6820-amc board: plugin card for some of Marvell's switch
development kits
- fix SPI and I2C bus warnings coming with the new checks in dtc
- add new compatible string "marvell,prestera" to the armada-xp-98dx*
- fix sdhci supply property name on the clearfog (the '-supply' suffix
was missing)
* tag 'mvebu-dt-4.20-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: clearfog: fix sdhci supply property name
ARM: dts: mvebu: add "marvell,prestera" to PP nodes
ARM: dts: marvell: Fix SPI and I2C bus warnings
ARM: dts: mvebu: Add device tree for db-88f6820-amc board
ARM: dts: mvebu: db-xc3-24g4: use new style nand binding
ARM: dts: mvebu: db-dxbc2: use new style nand binding
ARM: dts: mvebu: 98dx3236: Rename nand controller node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Freescale arm64 device tree update for 4.20:
- Add the second Dual UART device for LS208xA SoCs.
- Add necessary big-endian property for NOR device on LS104xA based
boards, remove unneeded big-endian property from IFC controller.
- DTC has new checks for I2C and SPI buses to land into 4.20. A patch
from Rob to fix the bus node names and warnings in unit-addresses.
* tag 'imx-dt64-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: fsl: Fix I2C and SPI bus warnings
arm64: dts: ls208xa: add second duart
arm64: dts: fsl: remove big-endian field from IFC controller
arm64: dts: Add big-endian in nor node for ls104xa
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
i.MX device tree update for 4.20:
- New board support: Engicam's i.Core MX6 CPU module v1.5; ConnectCore
6UL Single Board Computer (SBC) Pro; i.MX6 ULZ based EVK board.
- Add Add SFF interface support for vf610-zii board.
- Disable unneeded devices like VPU and internal watchdog for imx51-zii
boards.
- Add 'no-sdio' and 'no-sd' property for vf610-zii-cfu1 board.
- Improve i.MX6 SLL GPIO support by adding gpio-ranges property and
clocks information.
- Update iomux header for i.MX7 Solo and i.MX6 ULL.
- Enable GPIO buttons as wakeup source for imx7d-sdb and imx6sx-sdb.
- Add GPIO keys and egalax touch screen support for imx6qdl-sabreauto.
- Switch to use SPDX-License-Identifier for more boards - vf610-twr,
imx7s-warp, Engicam boards.
- Add device tree bindings of 'fsl,pmic-stby-poweroff' property and add
the support for i.MX6 RIoTboard.
- DTC has new checks for SPI buses which will be landed on 4.20.
A patch from Rob to fix those 100+ warnings on i.MX boards. (Thanks!)
- Switch i.MX7 device tree to use updated coresight binding for
hardware ports.
- Misc small or random update and cleanup.
* tag 'imx-dt-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (50 commits)
ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support
dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board
ARM: dts: imx53-ppd: Remove 'num-chipselects' property
ARM: dts: vf610-twr: Switch to SPDX identifier
ARM: dts: vf: Switch to SPDX identifier
ARM: dts: imx6qdl-zii-rdu2: Disable the internal RTC
ARM: dts: imx51-zii-rdu1: Fix the rtc compatible string
ARM: dts: imx6ul: use nvmem-cells for cpu speed grading
ARM: dts: imx: Fix SPI bus warnings
ARM: dts: imx7: Update coresight binding for hardware ports
ARM: dts: vf610-zii-cfu1: Pass the 'no-sd' property
ARM: dts: vf610-zii-cfu1: Pass the 'no-sdio' property
ARM: dts: imx51-zii-scu2-mezz: Disable the internal watchdog
ARM: dts: imx51-zii-scu2-mezz: Disable VPU
ARM: dts: imx51-zii-scu3-esb: Disable VPU
ARM: dts: imx51: Add label for VPU node
ARM: dts: imx6ull: update vdd_soc voltage for 900MHz operating point
ARM: dts: imx6ul: Add DTS for ConnectCore 6UL SBC Pro
ARM: dts: imx6: RIoTboard provide standby on power off option
dt-bindings: imx6q-clock: add new fsl,pmic-stby-poweroff property
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Qualcomm Device Tree Changes for v4.20
* Fix IRQ constants usage on MSM8974
* Add led, gpio-button, sdcc, and pcie nodes for IPQ8064
* Move/cleanup common nodes for IPQ8064
* Add i2c sensor nodes for MSM8974 Hammerhead
* Fixes for SAW, kpss, opp, pci range, and space/tab on IPQ4019
* Update coresight bindings
* tag 'qcom-dts-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: qcom: Update coresight bindings for hardware ports
ARM: dts: qcom-msm8974: change invalid flag IRQ NONE to valid value
ARM: dts: qcom: ipq4019: fix space vs tab indenting inside qcom-ipq4019.dtsi
ARM: dts: qcom: ipq4019: fix PCI range
ARM: dts: qcom: ipq4019: fix cpu0's qcom,saw2 reg value
ARM: dts: qcom: ipq4019: add cpu operating points for cpufreq support
ARM: dts: qcom: ipq4019: use v2 of the kpss bringup mechanism
ARM: dts: qcom: msm8974-hammerhead: add device tree bindings for ALS / proximity
ARM: dts: qcom: msm8974-hammerhead: add device tree bindings for mpu6515
ARM: dts: qcom: Add led and gpio-button nodes to ipq8064 boards
ARM: dts: qcom: Move common nodes to ipq8064-v.1.0.dtsi
ARM: dts: qcom: Add sdcc nodes for ipq8064
ARM: dts: qcom: Add pcie nodes for ipq8064
ARM: dts: qcom-msm8974: change invalid flag IRQ NONE to valid value
ARM: dts: qcom-msm8974: use named constant for interrupt flag NONE
ARM: dts: qcom-msm8974: use named constant for interrupt flag LEVEL HIGH
ARM: dts: qcom-msm8974: use named constant for interrupt flag EDGE RISING
ARM: dts: qcom-msm8974: use named constant for interrupt type GIC_SPI
ARM: dts: qcom-msm8974: use named constant for interrupt type GIC_PPI
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Actions Semi arm based SoC DT for v4.20
This updates SPDX headers for remaining files.
* tag 'actions-arm-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
ARM: dts: owl: Convert to new-style SPDX license identifiers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allwinner DT changes for 4.20
Our usual bunch of DT patches for the Allwinner arm32 SoCs.
The most notable changes are:
- Support for the video decoding / encoding engine on the
A10s/A13/A20/A33
- IR support for the A83t
- SATA support for the R40
* tag 'sunxi-dt-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun9i: Fix I2C bus warnings
ARM: dts: sunxi: Fix I2C bus warnings
ARM: dts: sun8i-a33: Add Video Engine and reserved memory nodes
ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes
ARM: dts: sun5i: Add Video Engine and reserved memory nodes
ARM: dts: sun8i: sun8i-r40-bananapi-m2-ultra: enable AHCI
ARM: dts: sun8i: r40: add sata node
ARM: dts: sunxi: Don't use cd-inverted in sun8i-r40-bananapi-m2-ultra
ARM: dts: sun8i: a83t: bananapi-m3: Enable IR controller
ARM: dts: sun8i: a83t: Add support for the cir interface
ARM: dts: sun8i: a83t: Add the cir pin for the A83T
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allwinner H3 and H5 DT additions for 4.20
This is our usual H3/H5 pull request
The most notable changes are:
- the video decoding / encoding unit is finally enabled on the H3
- Mali support for the H5
- New boards: BananaPi M2+ v1.2, Orange Pi Zero Plus 2 H3 support
* tag 'sunxi-h3-h5-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees
ARM: dts: sun8i-h3: Add Video Engine and reserved memory nodes
arm64: dts: allwinner: h5: Add device tree for Bananapi M2 Plus H5
ARM: dts: sun8i: h3: Split out non-SoC-specific parts of Bananapi M2 Plus
ARM: dts: sun8i: h3: bpi-m2-plus: Fix address for external RGMII Ethernet PHY
ARM: dts: sun8i: h3-h5: ir register size should be the whole memory block
arm64: dts: allwinner: h5: Add device node for Mali-450 GPU
ARM: dts: sun8i: Add initial Orangepi Zero Plus 2 H3 support
nvmem: sunxi-sid: add support for H5's SID controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Going primarily by:
https://en.wikipedia.org/wiki/List_of_Intel_Atom_microprocessors
with additional information gleaned from other related pages; notably:
- Bonnell shrink was called Saltwell
- Moorefield is the Merriefield refresh which makes it Airmont
The general naming scheme is: FAM6_ATOM_UARCH_SOCTYPE
for i in `git grep -l FAM6_ATOM` ; do
sed -i -e 's/ATOM_PINEVIEW/ATOM_BONNELL/g' \
-e 's/ATOM_LINCROFT/ATOM_BONNELL_MID/' \
-e 's/ATOM_PENWELL/ATOM_SALTWELL_MID/g' \
-e 's/ATOM_CLOVERVIEW/ATOM_SALTWELL_TABLET/g' \
-e 's/ATOM_CEDARVIEW/ATOM_SALTWELL/g' \
-e 's/ATOM_SILVERMONT1/ATOM_SILVERMONT/g' \
-e 's/ATOM_SILVERMONT2/ATOM_SILVERMONT_X/g' \
-e 's/ATOM_MERRIFIELD/ATOM_SILVERMONT_MID/g' \
-e 's/ATOM_MOOREFIELD/ATOM_AIRMONT_MID/g' \
-e 's/ATOM_DENVERTON/ATOM_GOLDMONT_X/g' \
-e 's/ATOM_GEMINI_LAKE/ATOM_GOLDMONT_PLUS/g' ${i}
done
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: dave.hansen@linux.intel.com
Cc: len.brown@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Implements counter freezing for Arch Perfmon v4 (Skylake and
newer). This allows to speed up the PMI handler by avoiding
unnecessary MSR writes and make it more accurate.
The Arch Perfmon v4 PMI handler is substantially different than
the older PMI handler.
Differences to the old handler:
- It relies on counter freezing, which eliminates several MSR
writes from the PMI handler and lowers the overhead significantly.
It makes the PMI handler more accurate, as all counters get
frozen atomically as soon as any counter overflows. So there is
much less counting of the PMI handler itself.
With the freezing we don't need to disable or enable counters or
PEBS. Only BTS which does not support auto-freezing still needs to
be explicitly managed.
- The PMU acking is done at the end, not the beginning.
This makes it possible to avoid manual enabling/disabling
of the PMU, instead we just rely on the freezing/acking.
- The APIC is acked before reenabling the PMU, which avoids
problems with LBRs occasionally not getting unfreezed on Skylake.
- Looping is only needed to workaround a corner case which several PMIs
are very close to each other. For common cases, the counters are freezed
during PMI handler. It doesn't need to do re-check.
This patch:
- Adds code to enable v4 counter freezing
- Fork <=v3 and >=v4 PMI handlers into separate functions.
- Add kernel parameter to disable counter freezing. It took some time to
debug counter freezing, so in case there are new problems we added an
option to turn it off. Would not expect this to be used until there
are new bugs.
- Only for big core. The patch for small core will be posted later
separately.
Performance:
When profiling a kernel build on Kabylake with different perf options,
measuring the length of all NMI handlers using the nmi handler
trace point:
V3 is without counter freezing.
V4 is with counter freezing.
The value is the average cost of the PMI handler.
(lower is better)
perf options ` V3(ns) V4(ns) delta
-c 100000 1088 894 -18%
-g -c 100000 1862 1646 -12%
--call-graph lbr -c 100000 3649 3367 -8%
--c.g. dwarf -c 100000 2248 1982 -12%
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: acme@kernel.org
Link: http://lkml.kernel.org/r/1533712328-2834-2-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Enable the USB3 and USB2 phys implemented in UniPhier SoCs.
These phys are necessary for dwc3 and ehci controllers driving
the USB ports on Pro4 and PXs2 SoCs.
Since the USB host drivers are already built-in, so only the phy
driver are missing to allow booting with USB devices.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allwinner arm64 config changes for 4.20
Here is a single config change to enable the DRM driver in the arm64
defconfig.
* tag 'sunxi-config64-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: defconfig: Enable CONFIG_DRM_SUN4I
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The syscall fallbacks in the vDSO have incorrect asm constraints.
They are not marked as writing to their outputs -- instead, they are
marked as clobbering "memory", which is useless. In particular, gcc
is smart enough to know that the timespec parameter hasn't escaped,
so a memory clobber doesn't clobber it. And passing a pointer as an
asm *input* does not tell gcc that the pointed-to value is changed.
Add in the fact that the asm instructions weren't volatile, and gcc
was free to omit them entirely unless their sole output (the return
value) is used. Which it is (phew!), but that stops happening with
some upcoming patches.
As a trivial example, the following code:
void test_fallback(struct timespec *ts)
{
vdso_fallback_gettime(CLOCK_MONOTONIC, ts);
}
compiles to:
00000000000000c0 <test_fallback>:
c0: c3 retq
To add insult to injury, the RCX and R11 clobbers on 64-bit
builds were missing.
The "memory" clobber is also unnecessary -- no ordering with respect to
other memory operations is needed, but that's going to be fixed in a
separate not-for-stable patch.
Fixes: 2aae950b21 ("x86_64: Add vDSO for x86-64 with gettimeofday/clock_gettime/getcpu")
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/2c0231690551989d2fafa60ed0e7b5cc8b403908.1538422295.git.luto@kernel.org
