Remove board specific gpio-fan driver registration. Moved into device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds DT board setup for the LaCie NAS Network Space Mini v2
(aka SafeBox). The hardware characteristics are very close to those of
the Network Space Lite v2. The main difference are:
- A GPIO fan which is only available on the NS2 Mini.
- A single USB host port is wired on the NS2 Mini. The NS2 Lite provides
an additional dual-mode USB port (host/device).
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds DT board setup for the LaCie NAS Network Space Lite v2.
This board is derived from the Network Space v2 and a lot of hardware
characteristics are shared.
- CPU: Marvell 88F6192 800Mhz
- SDRAM memory: 128MB DDR2 200Mhz
- 1 SATA port: internal
- Gigabit ethernet: PHY Marvell 88E1318
- Flash memory: SPI NOR 512KB (Macronix MX25L4005A)
- i2c EEPROM: 512 bytes (24C04 type)
- 2 USB2 ports: host and host/device
- 1 push button
- 1 SATA LED (bi-color, blue and red)
Note that the SATA LED is not compatible with the driver leds-ns2. The
LED behaviour ("on", "off" or "SATA activity blink") is controlled via
a single MPP (21).
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds DT board setup for LaCie Network Space v2 and parents,
based on the Marvell Kirkwood 6281 SoC. This includes Network Space v2
(Max) and Internet Space v2.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add hardware I/O coherency support for Armada 370/XP
The purpose of this patch set is to add hardware I/O Coherency support
for Armada 370 and Armada XP. Theses SoCs come with an unit called
coherency fabric. A beginning of the support for this unit have been
introduced with the SMP patch set. This series extend this support:
the coherency fabric unit allows to use the Armada XP and the Armada
370 as nearly coherent architectures.
The third patches enables this new feature and register our own set
of DMA ops, to benefit this hardware enhancement.
The first patches exports a dma operation function needed to register
our own set of dma ops.
The second patch introduces a new flag for the address decoding
configuration in order to be able to set the memory windows as
shared memory.
SMP support for Armada XP
The purpose of this series is to add the SMP support for the Armada XP
SoCs. Beside the SMP support itself brought by the last 3 commits,
this series also adds the support for the coherency fabric unit and
the power management service unit.
The coherency fabric is responsible for ensuring hardware coherency
between all CPUs and between CPUs and I/O masters. This unit is also
available for Armada 370 and will be used in an incoming patch set
for hardware I/O cache coherency.
The power management service unit is responsible for powering down and
waking up CPUs and other SOC units.
From Michal Simek:
This branch depends on arm-soc devel/debug_ll_init branch because
we needed Rob's "ARM: implement debug_ll_io_init()"
(sha1: afaee03511ba8002b26a9c6b1fe7d6baf33eac86)
patch.
This branch also depends on zynq/dt branch because of previous major
zynq changes.
zynq/cleanup branch is subset of zynq/dt.
* 'zynq/multiplatform' of git://git.monstr.eu/linux-2.6-microblaze:
ARM: zynq: Remove all unused mach headers
ARM: zynq: add support for ARCH_MULTIPLATFORM
ARM: zynq: make use of debug_ll_io_init()
ARM: zynq: remove TTC early mapping
ARM: zynq: add clk binding support to the ttc
ARM: zynq: use zynq clk bindings
clk: Add support for fundamental zynq clks
ARM: zynq: dts: split up device tree
ARM: zynq: Allow UART1 to be used as DEBUG_LL console.
ARM: zynq: dts: add description of the second uart
ARM: zynq: move arm-specific sys_timer out of ttc
zynq: move static peripheral mappings
zynq: remove use of CLKDEV_LOOKUP
zynq: use pl310 device tree bindings
zynq: use GIC device tree bindings
Add/add conflict in arch/arm/Kconfig.debug.
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12
SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA
PHY.
As I commented on [4/7], this branch merged pinctrl/samsung to support
pinctrl for exynos4x12 without useless merge conflicts.
* 'next/dt-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (32 commits)
ARM: EXYNOS: DT Support for SATA and SATA PHY
ARM: dts: Remove broken-voltage property from sdhci node for exynos4210-trats
ARM: dts: Add node for touchscreen for exynos4210-trats
ARM: dts: Add node for touchscreen voltage regulator for exynos4210-trats
ARM: dts: Add node for i2c3 bus for exynos4210-trats
ARM: dts: Add nodes for GPIO keys available on Trats
ARM: dts: Update for pinctrl-samsung driver for exynos4210-trats
ARM: dts: Add nodes for pin controllers for exynos4x12
pinctrl: samsung: Add support for EXYNOS4X12
gpio: samsung: Skip registration if pinctrl driver is present on EXYNOS4X12
ARM: EXYNOS: Skip wakeup-int setup if pinctrl driver is used on EXYNOS4X12
ARM: dts: add board dts file for EXYNOS4412 based SMDK board
ARM: dts: Add support for EXYNOS4X12 SoCs
ARM: EXYNOS: Add devicetree node for TMU driver for exynos5
ARM: EXYNOS: Add devicetree node for TMU driver for exynos4
ARM: EXYNOS: Add MFC device tree support
ARM: dts: Enable serial controllers on Origen and SMDKV310
Documentation: Update samsung-pinctrl device tree bindings documentation
pinctrl: samsung: Add GPIO to IRQ translation
pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
...
Add/add conflicts in:
arch/arm/boot/dts/exynos5250-smdk5250.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/mach-exynos/mach-exynos5-dt.c
Signed-off-by: Olof Johansson <olof@lixom.net>
From Maxime Ripard:
Here is a pull request to add the support for Allwinner A10 SoCs.
* sunxi/soc2:
ARM: sunxi: Add sunxi restart function via onchip watchdog
ARM: sunxi: Add sun4i and cubieboard support
ARM: sunxi: Add earlyprintk support for UART0 (sun4i)
ARM: sunxi: Restructure sunxi dts/dtsi files
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
This includes supporting legacy i2c controller and ARM down clock
support for exynos5 and small changes.
[olof: It contains a dependency on samsung/hdmi for HDMI DT bindings, for some reason.]
* 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Clock settings for SATA and SATA PHY
ARM: EXYNOS: Add ARM down clock support
ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
ARM: EXYNOS: Add aliases for i2c controller
ARM: EXYNOS: Setup legacy i2c controller interrupts
ARM: EXYNOS: removing exynos-drm device registration from non-dt platforms
ARM: EXYNOS: add clocks for exynos5 hdmi
ARM: dts: add device tree support for exynos5 hdmiddc
ARM: dts: add device tree support for exynos5 hdmiphy
ARM: dts: add device tree support for exynos5 mixer
ARM: dts: add device tree support for exynos5 hdmi
ARM: EXYNOS: Add dp clock support for EXYNOS5
ARM: SAMSUNG: call clk_get_rate for debugfs rate files
ARM: SAMSUNG: add clock_tree debugfs file in clock
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12
SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA
PHY.
As I commented on [4/7], this branch merged pinctrl/samsung to support
pinctrl for exynos4x12 without useless merge conflicts.
* samsung/pinctrl:
pinctrl: samsung: Update error check for unsigned variables
pinctrl: samsung: Add support for EXYNOS4X12
Documentation: Update samsung-pinctrl device tree bindings documentation
pinctrl: samsung: Add GPIO to IRQ translation
pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts
pinctrl: samsung: Use one GPIO chip per pin bank
pinctrl: exynos: Use one IRQ domain per pin bank
pinctrl: samsung: Include bank-specific eint offset in bank struct
pinctrl: samsung: Hold pointer to driver data in bank struct
pinctrl: samsung: Match pin banks with their device nodes
ARM: dts: exynos4210-pinctrl: Add nodes for pin banks
pinctrl: samsung: Distinguish between pin group and bank nodes
pinctrl: samsung: Remove static pin enumerations
pinctrl: samsung: Assing pin numbers dynamically
pinctrl: samsung: Do not pass gpio_chip to pin_to_reg_bank
pinctrl: samsung: Detect and handle unsupported configuration types
From Kukjin Kim:
This is for adding support for DT based exynos5250 hdmi and it adds
device node for hdmi, mixer, hdmiphy and hdmiddc.
* 'next/hdmi-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: removing exynos-drm device registration from non-dt platforms
ARM: EXYNOS: add clocks for exynos5 hdmi
ARM: dts: add device tree support for exynos5 hdmiddc
ARM: dts: add device tree support for exynos5 hdmiphy
ARM: dts: add device tree support for exynos5 mixer
ARM: dts: add device tree support for exynos5 hdmi
Armada 370 and XP come with an unit called coherency fabric. This unit
allows to use the Armada 370/XP as a nearly coherent architecture. The
coherency mechanism uses snoop filters to ensure the coherency between
caches, DRAM and devices. This mechanism needs a synchronization
barrier which guarantees that all the memory writes initiated by the
devices have reached their target and do not reside in intermediate
write buffers. That's why the architecture is not totally coherent and
we need to provide our own functions for some DMA operations.
Beside the use of the coherency fabric, the device units will have to
set the attribute flag of the decoding address window to select the
accurate coherency process for the memory transaction. This is done
each device driver programs the DRAM address windows. The value of the
attribute set by the driver is retrieved through the
orion_addr_map_cfg struct filled during the early initialization of
the platform.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
This patch enhances the IRQ controller driver to add support for
Inter-Processor-Interrupts that are needed to enable SMP support.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 370 and Armada XP SOCs have a power management service unit
which is responsible for powering down and waking up CPUs and other
SOC units. This patch adds support for this unit.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 370 and Armada XP SOCs have a coherency fabric unit which
is responsible for ensuring hardware coherency between all CPUs and
between CPUs and I/O masters. This patch provides the basic support
needed for SMP.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
This patch modifies pin control groups of SD pins on EXYNOS4210
and EXYNOS4X12 to use drive strength 3 as a default value which
corresponds to S5P_GPIO_DRVSTR_LV4 in legacy non-DT code.
This is needed at least on Origen board for sdhci2 to work and
if any other drive strength is required on each board, we can
overide it.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: edited commit message]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch modifies sdhci nodes present in Origen device tree source
to use current generic mmc bindings.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch updates all parts of Origen dts related to pin configuration
to use new GPIO and pinctrl bindings, instead of (now unsupported on
Exynos4) legacy gpio-samsung bindings.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes memory configuration defined in dts file of Origen
board from single 1 GiB section into four 256 MiB sections to match
section size limit.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This is similar to a recent commit for exynos5250 titled:
ARM: EXYNOS: Add aliases for i2c controller
Adding aliases will be useful to prevent warnings in a future
change. See:
i2c: s3c2410: Get the i2c bus number from alias id
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
From Pawel Moll:
* 'vexpress-clk-soc' of git://git.linaro.org/people/pawelmoll/linux:
ARM: vexpress: Remove motherboard dependencies in the DTS files
ARM: vexpress: Start using new Versatile Express infrastructure
ARM: vexpress: Add config bus components and clocks to DTs
mfd: Versatile Express system registers driver
mfd: Versatile Express config infrastructure
From Stephen Warren:
ARM: bcm2835: core SoC enhancements
A machine restart/reboot implementation is added. The GPIO/pinmux
controller is instantiated, and dummy gpio.h added.
* tag 'bcm2835-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: enable GPIO/pinctrl
ARM: bcm2835: implement machine restart hook
Signed-off-by: Olof Johansson <olof@lixom.net>
From Stephen Warren:
ARM: tegra: core SoC code enhancements
Various small clock initialization table and driver changes to support
WiFi modules, SPI controllers, and host1x (graphics/display hardware).
Various AHB/APB-related clocks were added to the Tegra30 clock driver.
The level 2 cache initialization is now driven by data from device tree,
and the cache configuration tweaked.
AUXDATA is added to support SPI controllers and host1x.
Code to decode Tegra's "speedo" process identification fuses is added.
This pull request is based on tegra-for-3.8-cleanup.
* tag 'tegra-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (26 commits)
ARM: tegra: Add Tegra30 host1x clock support
ARM: tegra: Add AUXDATA for Tegra30 host1x
ARM: tegra: Add Tegra20 host1x clock support
ARM: tegra: Add AUXDATA for Tegra20 host1x
ARM: tegra: Tegra30 speedo-based process identification
ARM: tegra: Add speedo-based process identification
ARM: tegra: flexible spare fuse read function
ARM: tegra: Implement 6395/1 for Tegra
ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
ARM: tegra: enable data prefetch on L2
ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt
ARM: tegra: common: using OF api for L2 cache init
ARM: tegra: dt: add L2 cache controller
ARM: tegra30: clocks: add AHB and APB clocks
ARM: tegra: set up wlan clocks for tegra dt
ARM: tegra: move irammap.h to mach-tegra
ARM: tegra: move iomap.h to mach-tegra
ARM: tegra: remove <mach/dma.h>
ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
ARM: tegra: remove unnecessary includes of <mach/*.h>
...
From Lee Jones. It's an update of the previous ux500/dt branch with a few more
patches:
* 'ste-dt-for-next' of git://git.linaro.org/people/ljones/linux-3.0-ux500:
ARM: ux500: Describe UART platform registering issues more accurately
ARM: ux500: Enable all MMC devices on the u9540 when booting with DT
ARM: ux500: Enable SDI4 port on the u9540 when booting with Device Tree
ARM: ux500: Add UART support to the u9540 Device Tree
ARM: ux500: Add skeleton DTS file for the u9540
ARM: ux500: Add SDI (MMC) support to the HREF Device Tree
ARM: ux500: Move regulator-name properties out to board DTS files
Signed-off-by: Olof Johansson <olof@lixom.net>
From Roland Stigge:
DTS updates for the LPC32xx Soc for 3.7
This time, only one patch: Adding the motor PWM to lpc32xx.dtsi
* tag 'lpc32xx-dts-for-3.7' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Add the motor PWM to base dts file
Signed-off-by: Olof Johansson <olof@lixom.net>
From Stephen Warren:
ARM: tegra: device tree changes
A wide variety of device tree additions are made across many Tegra
boards:
* WiFi is supported on Seaboard, Ventana, and Cardhu.
* An I2C mux is added for Ventana, and Tamonten.
* SPI flash is added to Cardhu, and TrimSlice.
* Temperature sensors are added to Harmony, Tamonten, and Ventana.
* host1x (graphics/display controller) is added to the SoC include files.
* HDMI displays are enabled on Harmony, TrimSlice, Tamonten, Plutux, Tec,
and Whistler.
This pull request is based on tegra-for-3.8-soc.
* tag 'tegra-for-3.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (47 commits)
ARM: tegra: whistler: enable HDMI port
ARM: tegra: tec: Enable HDMI output
ARM: tegra: plutux: Enable HDMI output
ARM: tegra: tamonten: Add host1x support
ARM: tegra: trimslice: enable HDMI port
ARM: tegra: harmony: enable HDMI port
ARM: tegra: Add Tegra30 host1x support
ARM: tegra: Add Tegra20 host1x support
ARM: tegra: trimslice: enable SPI flash
ARM: tegra: dts: add sflash controller dt entry
ARM: tegra: ventana: Add NCT1008 temperature sensor
ARM: tegra: tamonten: Add NCT1008 temperature sensor
ARM: tegra: harmony: Add ADT7641 temperature sensor
ARM: tegra: tec: Remove redundant DT properties
ARM: tegra: tamonten: Add DDC/PTA pinmux
ARM: tegra: dts: cardhu: enable SLINK4
ARM: tegra: dts: add slink controller dt entry
ARM: dt: tegra: ventana: define pinmux for ddc
ARM: dt: t30 cardhu: set pinmux and power for wlan
ARM: dt: t20 ventana: set pinmux and power for wlan
...
From Stephen Warren:
ARM: tegra: cleanup for 3.8
Various trivial cleanup changes of the Tegra code for 3.8.
Many of the changes simply remove useless #include statements, which
enable those headers to be removed or moved later, as work towards
multi-platform zImage support.
<mach/{iram,io}map.h> are moved up to arch/arm/mach-tegra to prevent
any new code outside mach-tegra from using them.
Finally, the regulator definitions in all board device tree files are
updated to use the new simpler syntax that was agreed upon.
* tag 'tegra-for-3.8-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: move irammap.h to mach-tegra
ARM: tegra: move iomap.h to mach-tegra
ARM: tegra: remove <mach/dma.h>
ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
ARM: tegra: remove unnecessary includes of <mach/*.h>
iommu: tegra: remove include of <mach/iomap.h>
staging: nvec: remove include of <mach/iomap.h>
crypto: tegra: remove include of <mach/clk.h>
ARM: tegra: update *.dts for regulator-compatible deprecation
usb: phy: tegra remove include of <mach/iomap.h>
usb: host: tegra remove include of <mach/iomap.h>
From Nicolas Ferre:
More DT material for AT91:
- conversion of watchdog to DT
- usart definition for evk-pro3 board
* tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91:
ARM: at91/dts: evk-pro3: enable watchdog
ARM: at91/dts: add at91sam9_wdt driver to at91sam926x, at91sam9g45
watchdog: at91sam9_wdt: add device tree support
ARM: at91: dt: evk-pro3: enable uart0 and uart2
From Maxime Ripard:
Allwinner SoC support for 3.8
* tag 'tags/sunxi-support-for-3.8' of git://github.com/mripard/linux:
ARM: sunxi: Add entry to MAINTAINERS
ARM: sunxi: Add device tree for the A13 and the Olinuxino board
ARM: sunxi: Add earlyprintk support
ARM: sunxi: Add basic support for Allwinner A1x SoCs
irqchip: sunxi: Add irq controller driver
clocksource: sunxi: Add Allwinner A1X Timer Driver
clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
A couple devices' DT compatible values only contained the device name
without any vendor prefix. Add the missing vendor prefixes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This dts file is based on the Snow dts file in the Chromium OS kernel
tree with the following changes:
* Some details have been updated to match the exynos5250-smdk5250.dts
file from linux-next (as of c11068538994430547722dc9fb515a0ceefd5cb9).
* This file doesn't include references to hardware whose upstream
support isn't quite there yet. That includes most i2c devices.
Note that most i2c busses have been included with no devices.
The Snow dts file is mostly just an include of the "cros5250" dts file
which describes a class of similar boards. Support for other boards has
not yet been send upstream.
With this file and a change to use UART3 for serial output I can:
* Boot to a command line using either SD or EMMC as a root filesystem
* See the power button and lid switch using evtest.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The aliases for dwmmc were placed in the SMDK5250 dts file but really
should be common for all exynos5250 boards. Move it to the common CPU
file.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Marvell boards changes related to Ethernet, for 3.8
Conflicts:
arch/arm/boot/dts/armada-370-xp.dtsi
arch/arm/boot/dts/armada-xp-db.dts
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
The mvneta driver for the Marvell Armada 370/XP Ethernet devices has
gained proper clock framework integration, and the corresponding
Device Tree nodes now have a correct 'clocks' pointer.
The 'clock-frequency' properties in the various .dts files for Armada
370/XP boards have therefore become useless.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
The mvneta driver now understands a standard 'clocks' clock pointer
property in the Device Tree nodes for the Ethernet devices, so we add
the right clock reference for the different Ethernet ports of the
Armada 370/XP SoCs.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
The u9540 supports 3 MMC devices. This patch enables two of them
and updates the configuration of the already enabled SDI4 port.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Here we add the device node for the SDI4 (MMC) port to the u9540
Device Tree source file. This will allow successful probing of
the internal MMC storage device when booting with DT enabled.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch sees the creation of a sparse Device Tree file for
ST-Ericsson's latest development board supporting the latest
dual-core Cortex-a9 u9540 SoC.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Here we add the Device Tree nodes which are required to successfully
probe the MMCI driver which will enable the four cards available on
ST-Ericsson's HREF hardware development platform.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Regulator supply names should be allocated by board rather than
per SoC, as the same SoC could be wired differently on varying
hardware. Here we push all regulator-name allocation out to the
dbx5x0 subordinate board files; HREF and Snowball.
Requested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
