Commit e45600107b (Merge tag 'msm-cleanup-for-3.11' of
git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into
next/cleanup) incorrectly resolved a merge conflict, resulting in a
node address that doesn't match the register address.
Fix this node address.
Signed-off-by: David Brown <davidb@codeaurora.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Santosh Shilimkar:
SOC support for Keystone II devices:
- Minimal machine and device-tree support with arch_timers and console UART
- Reboot hook using PLL reset
- Low level debug support using UART
- SMP boot support
* tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: Enable SMP support on Keystone machines
ARM: keystone: Add minimal TI Keystone platform support
ARM: dts: keystone: Add minimal Keystone SOC device tree data
Signed-off-by: Olof Johansson <olof@lixom.net>
The convention for Device Tree node names is <device>@<hex-address>, where
the part after '@' shouldn't contain the "0x" prefix. Fix the sh73a0.dtsi
DT names.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
By default the exynos RTC is disabled. Enable it for snow. There's
also an external RTC on the max77686 PMIC but we haven't yet enabled
that.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The issues reported in commit 522ccdb6fd ("ARM: dts: Disable the RTC
by default on exynos5") are no longer reproduced on EXYNOS5250 based
Arndale board. Hence re-enabling RTC support for Arndale board.
This is helpful for testing S2R on Arndale board.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since the pdma works only in secure mode, accessing the same
in hypervisor mode gives an abort. As we are not using pdma
anywhere, removing the same.
Signed-off-by: Giridhar Maruthy <giridhar.m@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch updates cpu frequency level from 1500 to 800MHZ in steps
of 100MHZ. The corresponding voltage(in uV) is also added.
Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds the required regulator supplies and properties
for wm8994 codec on smdk5250 board.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables the SPI in EXYNOS5440 SoC. The NOR
Flash can be accessed by enabling the spi interface
Signed-off-by: Girish K S <ks.giri@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch corrects the base address of pinctrl_3 on Exynos5250
platform.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This switches the code using a local remapping of the
system controller to enable the U300 board to be
self-powered over to making the U300-specific syscon
compatible with the MFD generic syscon driver, selecting
the generic syscon driver, and augmenting the board
power code to pick the regmap and manipulate the syscon
from the regmap side of things.
Cc: Dong Aisheng <dong.aisheng@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the last of the U300 clocks to being probed from
the device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the slow, fast, AHB bridge and "rest" clocks on
the U300 system controller over to registration from the
device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the fixed and fixed-factor clocks in the U300
platform to register themselves from the device tree.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a device tree node for the U300 system controller
and remaps this dynamically instead of using hard-coded
virtual addresses. The board power set-up code is altered
to fetch a reference to the syscon using ampersand <&syscon>
notation. This way of passing a pointer to the syscon will
also be used by the clocks.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers the U300 FSMC flash controller from the
device tree, and defines the three partitions. Skip the
BBT scan as in the current platform data.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This probes the U300 dummy-spichip from the device tree
and adds the apropriate node to the tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers the PL022 PrimeCell from the U300 device
tree. We make a new copy of the platform data for the
device tree boot path, as the old platform data is in an
older file which will be going away.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the COH 901 318 DMA controller to the U300
device tree. All devices now converted to device tree
so far will start to find their DMA channels.
Note that the U300 is not yet using the device tree
to obtain DMA channels, but this is a first step.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds DMA channel assignments to the MMC/SD-controller
and the two UARTs already in the U300 device tree, as we
have now defined a way to obtain DMA channels from the
device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds support for the U300 MMC/SD card slot from the device
tree boot. No other changes needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that we have enabled board power and the AB3100 regulators,
put the regulator data into the device tree and enable it so
we can start to tie regulators to devices. To begin with we're
only supplying the power to the board itself.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds the missing VPU devicetree node for i.MX27 CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The gpio-ranges properties in vf610.dtsi were written according to an
older version of the GPIO bindings. Unfortunately, these were changed
incompatibly in commit 86853c8 "gpio: add gpio offset in gpio range
cells property". This patch adds the missing required extra cell in each
gpio-ranges property.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10,
so add a regulator controled by GPIO_4_10 for WM8962.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Setting GPIO_0 pad as clko1 clock output to provide MCLK for WM8962.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds name for NOR flash. This keeps compatibility for
commandline partitions parsing from old bootloaders and make name
of device same for DT and non-DT boot.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutonix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Enable the WEIM NOR for imx6q{dl}-sabreauto boards.
For the pin conflict with SPI NOR, its status is set to "disabled".
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add two pinctrls for WEIM:
one for the weim nor, another for the chipselect.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add two pinctrls for WEIM:
one for the weim nor, another for the chipselect.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add the clock and compatible information for the weim.
Also adds the weim label.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
In the imx6q-sabreauto and imx6dl-sabreauto boards,
the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but
it is used as a data pin for the WEIM NOR.
In order to fix the conflict, this patch removes the pin from the hog,
and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto.
The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
