3 Commits

Author	SHA1	Message	Date
Cezary Rojewski	ba202a7bc3	ASoC: Intel: catpt: Define DSP operations ... Implement dsp lifecycle functions such as core RESET and STALL, SRAM power control and LP clock selection. This also adds functions for handling transport over DW DMA controller. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200929141247.8058-5-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>	2020-10-02 15:32:30 +01:00
Cezary Rojewski	64b9b1b005	ASoC: Intel: catpt: Add IPC message handlers ... Declare global and stream IPC message handlers for all known message types. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200929141247.8058-4-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>	2020-10-02 15:32:29 +01:00
Cezary Rojewski	4fac9b31d0	ASoC: Intel: Add catpt base members ... Declare base structures, registers and extension routines for the catpt solution. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200929141247.8058-2-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>	2020-10-02 15:32:27 +01:00