If platform_data is NULL add reading of optional adi,micbias
property from DT. If adi,micbias is not set keep the default
value for micbias.
Signed-off-by: Bogdan Togorean <bogdan.togorean@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Fixes the following sparse warning:
sound/soc/codecs/wm8741.c:371:5: warning:
symbol 'wm8741_mute' was not declared. Should it be static?
Fixes: 36b1599340 ("ASoC: wm8741: Add digital mute callback")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Fixes the following sparse warnings:
sound/soc/codecs/cs35l36.c:135:20: warning:
symbol 'cs35l36_reg' was not declared. Should it be static?
sound/soc/codecs/cs35l36.c:248:6: warning:
symbol 'cs35l36_readable_reg' was not declared. Should it be static?
sound/soc/codecs/cs35l36.c:398:6: warning:
symbol 'cs35l36_precious_reg' was not declared. Should it be static?
sound/soc/codecs/cs35l36.c:410:6: warning:
symbol 'cs35l36_volatile_reg' was not declared. Should it be static?
Fixes: 6ba9dd6c89 ("ASoC: cs35l36: Add support for Cirrus CS35L36 Amplifier")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: James Schulman <james.schulman@cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The on-chip PLL can be disabled if on the MCLKI pin we have an external
clock at 512 x fs. This clock can be used as direct internal clock for
ADCs or DACs.
To support this, we add an extra clock id that can be configured
using the set_sysclk() callback.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The driver only supports DPS_A for DAC, which is configured at probe.
This patch adds support for DSP_A and I2S modes by using the set_fmt()
callback.
A trivial break is also removed from a case's default branch.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
By default, the codec starts to interpret the left (first) channel on
the falling edge (low polarity) of LRCLK. However, for DSP_A, the left
channel needs to start on the rising edge of LRCLK. This patch fixes
this channel swap by toggling the bit which selects the LRCLK polarity.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
DACs and ADCs on ad193x codecs require a 32 bit slot size. We should
assure that no other size is used.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Some ad193x codecs don't have ADCs, so they have no capture capabilities.
This way, we can use this driver in multicodec cards.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The previous implementatation was restrictive with regards to
BCLK rates for slave mode where the driver would not allow rates
the codec couldn't provide itself as clock master. The codec
is able to automatically determine and handle whatever rate is
provided so this restriction isn't necessary for slave mode. The
code was also flawed with regards to setting of the frame offset
as using rx_mask to explicitly set the offset has the knock on
effect of impacting the min and max channels for the codec, in
soc_pcm_hw_params() through the call to
soc_pcm_codec_params_fixup().
With this update, the driver now only limits frame size if codec
is clock master, and dynamically determines the BCLK offset
relating to WCLK using the tx_mask for slot offset along with the
slot width provided.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Previously the driver would default the BCLK periods per WCLK to
64, to cover all possible non-TDM scenarios when the codec was
DAI clock master. However some devices require a lower BCLK rate
to operate correctly so with this in mind, this commit updates
the code to be more dynamic, with BCLK rate now based on SR and
word length provided to hw_params().
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Fixes the following sparse warning:
sound/soc/codecs/cros_ec_codec.c:209:27: warning:
symbol 'cros_ec_dai' was not declared. Should it be static?
Fixes: b291f42a37 ("ASoC: cros_ec_codec: Add codec driver for Cros EC")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
As stated in 'TLV320AIC3254 Application Reference Guide' ([1]):
3.2 Device Startup Lockout Times
After the TLV320AIC3254 initializes through hardware reset at power-up
or software reset, the internal registers initialize to default values.
This initialization takes place within 1ms after pulling the RESET
signal high. During this initialization phase, no register-read or
register-write operation should be performed on ADC or DAC coefficient
buffers. Also, no block within the codec should be powered up during
the initialization phase.
[1] http://www.ti.com/lit/an/slaa408a/slaa408a.pdf
Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
For correct operation of the digital filtering and other processing on the
WM8741, the user must ensure the correct value of OSR[1:0] is set at all
times.[1] Hence, depending the selected sampling rate, set the OSR (over-
sampling rate) mode in hw_params().
References:
[1] "WM8741 Data Sheet"
Signed-off-by: Sergej Sawazki <sergej@taudac.com>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Loading/unloading modules exposes issues with memory allocation, which
is a mix of devm_kzalloc and manual kzalloc. Move to devm_k routines
everywhere to simplify all this.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
ADC and DAC can be clocked from separate or same sources CLK1 and CLK2.
By default, ADC is clocked from CLK1, and DAC - from CLK2.
This commits allows sound cards to selest a proper clock source during
`hw_params()` via `snd_soc_dai_set_sysclk()`. It makes possible to have a
single clock source for both ADC and DAC.
Signed-off-by: Kirill Marinushkin <kmarinushkin@birdec.tech>
Signed-off-by: Mark Brown <broonie@kernel.org>
Regulator notifiers, that were registered during codec driver probing,
must be unregistered during driver release, or device managed versions
have to be used. This patch fixes codec drivers, that weren't explicitly
unregistering notifiers and simplifies those, that did that manually.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Change the header comment to use C++ style, so that it looks more
consistent with the rest of ASoC.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
Show the knob to enable or disable the jz4740-codec driver, add a
proper description, and add a dependency on MIPS || COMPILE_TEST, as
this driver is only useful on MIPS.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add license information as a standard SPDX license notifier instead of
custom text.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
There is a spelling mistake in the SOC_SINGLE control name. Fix this.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add jz4725b-codec driver to support the internal CODEC found in the
JZ4725B SoC from Ingenic.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
According to the ssm2603 data sheet (control register sequencing), the
digital core should be activated only after all necessary bits in the
power register are enabled, and a delay determined by the decoupling
capacitor on the VMID pin has passed. If the digital core is activated
too early, or even before the ADC is powered up, audible artifacts
appear at the beginning of the recorded signal.
The digital core is also needed for playback, so when recording starts
it may already be enabled. This means we cannot get the power sequence
correct when we want to be able to start recording after playback.
As a workaround put the MIC mute switch into the DAPM routes. This
way we can keep the recording disabled until the MIC Bias has settled
and thus get rid of audible artifacts.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
m.felsch@pengutronix.de: adapt commit message
m.felsch@pengutronix.de: drop of configuration as mentioned by Mark:
https://patchwork.kernel.org/patch/10407449/
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
This driver use the gpio consumer interface.
Add the header as it's needed.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Set the channel number on each AIF widget to allow unused channels not
to be powered up across AIFs.
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add a codec driver to control ChromeOS EC codec.
Use EC Host command to enable/disable I2S recording and control other
configurations.
Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
CLASS-H controller/Amplifier is common accorss Qualcomm WCD codec series.
This patchset adds basic CLASS-H controller apis for WCD codecs after
wcd9335 to use.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC,
It supports both I2S/I2C and SLIMbus audio interfaces.
On slimbus interface it supports two data lanes; 16 Tx ports
and 8 Rx ports. It has Seven DACs and nine dedicated interpolators,
Seven (six audio ADCs, and one VBAT ADC), Multibutton headset
control (MBHC), Active noise cancellation and Sidetone paths
and processing.
This patchset adds very basic support for playback and capture
via the 9 interpolators and ADC respectively.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
In function rt5651_i2c_probe(), local variable "ret" could
be uninitialized if function regmap_read() returns -EINVAL.
However, this value is used in if statement. This is
potentially unsafe.
Signed-off-by: Yizhuo <yzhai003@ucr.edu>
Signed-off-by: Mark Brown <broonie@kernel.org>
The rationale behind the current calculation is somewhat obscure [1]
and can yield slightly wrong dividers in certain cases, which the
machine drivers for some boards (like the HiFiBerry DAC+ Pro)
seemingly try to circumvent, by updating the rate fraction so as to
suit this calculation.
The updated calculation should correctly yield the smallest bit clock
rate that would fit the frame.
[1] http://mailman.alsa-project.org/pipermail/alsa-devel/2019-January/144219.html
Signed-off-by: Dimitris Papavasiliou <dpapavas@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Some boards, such as the HiFiBerry DAC+ Pro, use a pair of external
oscillators, to generate 44.1 or 48kHz multiples and are forced to
resort to hacks [1] in order to support 24-bit data without ending up
with fractional dividers. This patch allows the machine driver to use
32-bit frames for 24-bit data to avoid such issues.
Although the datasheet (p. 15) seems to suggest that only a handful
of ratios are supported, it's not very explicit about it, so we allow
the full range of values supported by the underlying register in the
callback, to avoid needlessly rejecting potentially usable
configurations.
[1] http://mailman.alsa-project.org/pipermail/alsa-devel/2018-December/143442.html
Signed-off-by: Dimitris Papavasiliou <dpapavas@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
