Liu Shixin
98519ed691
dmaengine: xilinx_dma: call of_node_put() when breaking out of for_each_child_of_node()
...
[ Upstream commit 596b53ccc36a546ab28e8897315c5b4d1d5a0200 ]
Since for_each_child_of_node() will increase the refcount of node, we need
to call of_node_put() manually when breaking out of the iteration.
Fixes: 9cd4360de6liushixin2@huawei.com >
Acked-by: Peter Korsgaard <peter@korsgaard.com >
Link: https://lore.kernel.org/r/20221122021612.1908866-1-liushixin2@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2023-02-01 08:23:15 +01:00
Swati Agarwal
dae0b77cb8
dmaengine: xilinx_dma: Report error in case of dma_set_mask_and_coherent API failure
...
[ Upstream commit 8f2b6bc79c32f0fa60df000ae387a790ec80eae9 ]
The driver does not handle the failure case while calling
dma_set_mask_and_coherent API.
In case of failure, capture the return value of API and then report an
error.
Addresses-coverity: Unchecked return value (CHECKED_RETURN)
Signed-off-by: Swati Agarwal <swati.agarwal@xilinx.com >
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/20220817061125.4720-4-swati.agarwal@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2022-10-15 07:55:52 +02:00
Swati Agarwal
e0ca2998df
dmaengine: xilinx_dma: cleanup for fetching xlnx,num-fstores property
...
[ Upstream commit 462bce790e6a7e68620a4ce260cc38f7ed0255d5 ]
Free the allocated resources for missing xlnx,num-fstores property.
Signed-off-by: Swati Agarwal <swati.agarwal@xilinx.com >
Link: https://lore.kernel.org/r/20220817061125.4720-3-swati.agarwal@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2022-10-15 07:55:52 +02:00
Swati Agarwal
789e590cb8
dmaengine: xilinx_dma: Fix devm_platform_ioremap_resource error handling
...
[ Upstream commit 91df7751eb890e970afc08f50b8f0fa5ea39e03d ]
Add missing cleanup in devm_platform_ioremap_resource().
When probe fails remove dma channel resources and disable clocks in
accordance with the order of resources allocated .
Signed-off-by: Swati Agarwal <swati.agarwal@xilinx.com >
Link: https://lore.kernel.org/r/20220817061125.4720-2-swati.agarwal@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2022-10-15 07:55:51 +02:00
Radhey Shyam Pandey
95a0ba85c1
dmaengine: zynqmp_dma: In struct zynqmp_dma_chan fix desc_size data type
...
[ Upstream commit f9a9f43a62a04ec3183fb0da9226c7706eed0115 ]
In zynqmp_dma_alloc/free_chan_resources functions there is a
potential overflow in the below expressions.
dma_alloc_coherent(chan->dev, (2 * chan->desc_size *
ZYNQMP_DMA_NUM_DESCS),
&chan->desc_pool_p, GFP_KERNEL);
dma_free_coherent(chan->dev,(2 * ZYNQMP_DMA_DESC_SIZE(chan) *
ZYNQMP_DMA_NUM_DESCS),
chan->desc_pool_v, chan->desc_pool_p);
The arguments desc_size and ZYNQMP_DMA_NUM_DESCS were 32 bit. Though
this overflow condition is not observed but it is a potential problem
in the case of 32-bit multiplication. Hence fix it by changing the
desc_size data type to size_t.
In addition to coverity fix it also reuse ZYNQMP_DMA_DESC_SIZE macro in
dma_alloc_coherent API argument.
Addresses-Coverity: Event overflow_before_widen.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1652166762-18317-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2022-06-14 18:32:38 +02:00
Radhey Shyam Pandey
b26ced2625
dmaengine: xilinx_dma: Set DMA mask for coherent APIs
...
[ Upstream commit aac6c0f90799d66b8989be1e056408f33fd99fe6 ]
The xilinx dma driver uses the consistent allocations, so for correct
operation also set the DMA mask for coherent APIs. It fixes the below
kernel crash with dmatest client when DMA IP is configured with 64-bit
address width and linux is booted from high (>4GB) memory.
Call trace:
[ 489.531257] dma_alloc_from_pool+0x8c/0x1c0
[ 489.535431] dma_direct_alloc+0x284/0x330
[ 489.539432] dma_alloc_attrs+0x80/0xf0
[ 489.543174] dma_pool_alloc+0x160/0x2c0
[ 489.547003] xilinx_cdma_prep_memcpy+0xa4/0x180
[ 489.551524] dmatest_func+0x3cc/0x114c
[ 489.555266] kthread+0x124/0x130
[ 489.558486] ret_from_fork+0x10/0x3c
[ 489.562051] ---[ end trace 248625b2d596a90a ]---
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Reviewed-by: Harini Katakam <harini.katakam@xilinx.com >
Link: https://lore.kernel.org/r/1629363528-30347-1-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2021-09-26 14:09:00 +02:00
Adrian Larumbe
c160df90b0
dmaengine: xilinx_dma: Fix read-after-free bug when terminating transfers
...
[ Upstream commit 7dd2dd4ff9f3abda601f22b9d01441a0869d20d7 ]
When user calls dmaengine_terminate_sync, the driver will clean up any
remaining descriptors for all the pending or active transfers that had
previously been submitted. However, this might happen whilst the tasklet is
invoking the DMA callback for the last finished transfer, so by the time it
returns and takes over the channel's spinlock, the list of completed
descriptors it was traversing is no longer valid. This leads to a
read-after-free situation.
Fix it by signalling whether a user-triggered termination has happened by
means of a boolean variable.
Signed-off-by: Adrian Larumbe <adrian.martinezlarumbe@imgtec.com >
Link: https://lore.kernel.org/r/20210706234338.7696-3-adrian.martinezlarumbe@imgtec.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2021-08-26 08:35:35 -04:00
Laurent Pinchart
b671b98169
dmaengine: xilinx: dpdma: Limit descriptor IDs to 16 bits
...
[ Upstream commit 9f007e7b6643799e2a6538a5fe04f51c371c6657 ]
While the descriptor ID is stored in a 32-bit field in the hardware
descriptor, only 16 bits are used by the hardware and are reported
through the XILINX_DPDMA_CH_DESC_ID register. Failure to handle the
wrap-around results in a descriptor ID mismatch after 65536 frames. Fix
it.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Tested-by: Jianqiang Chen <jianqiang.chen@xilinx.com >
Reviewed-by: Jianqiang Chen <jianqiang.chen@xilinx.com >
Link: https://lore.kernel.org/r/20210520152420.23986-5-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2021-06-30 08:47:19 -04:00
Yu Kuai
86f3e72dcb
dmaengine: zynqmp_dma: Fix PM reference leak in zynqmp_dma_alloc_chan_resourc()
...
[ Upstream commit 8982d48af36d2562c0f904736b0fc80efc9f2532 ]
pm_runtime_get_sync will increment pm usage counter even it failed.
Forgetting to putting operation will result in reference leak here.
Fix it by replacing it with pm_runtime_resume_and_get to keep usage
counter balanced.
Reported-by: Hulk Robot <hulkci@huawei.com >
Signed-off-by: Yu Kuai <yukuai3@huawei.com >
Link: https://lore.kernel.org/r/20210517081826.1564698-4-yukuai3@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2021-06-30 08:47:18 -04:00
Quanyang Wang
be4789636f
dmaengine: xilinx: dpdma: initialize registers before request_irq
...
[ Upstream commit 538ea65a9fd1194352a41313bff876b74b5d90c5 ]
In some scenarios (kdump), dpdma hardware irqs has been enabled when
calling request_irq in probe function, and then the dpdma irq handler
xilinx_dpdma_irq_handler is invoked to access xdev->chan[i]. But at
this moment xdev->chan[i] hasn't been initialized.
We should ensure the dpdma controller to be in a consistent and
clean state before further initialization. So add dpdma_hw_init()
to do this.
Furthermore, in xilinx_dpdma_disable_irq, disable all interrupts
instead of error interrupts.
This patch is to fix the kdump kernel crash as below:
[ 3.696128] Unable to handle kernel NULL pointer dereference at virtual address 000000000000012c
[ 3.696710] xilinx-zynqmp-dpdma fd4c0000.dma-controller: Xilinx DPDMA engine is probed
[ 3.704900] Mem abort info:
[ 3.704902] ESR = 0x96000005
[ 3.704905] EC = 0x25: DABT (current EL), IL = 32 bits
[ 3.704907] SET = 0, FnV = 0
[ 3.704912] EA = 0, S1PTW = 0
[ 3.713800] ahci-ceva fd0c0000.ahci: supply ahci not found, using dummy regulator
[ 3.715585] Data abort info:
[ 3.715587] ISV = 0, ISS = 0x00000005
[ 3.715589] CM = 0, WnR = 0
[ 3.715592] [000000000000012c] user address but active_mm is swapper
[ 3.715596] Internal error: Oops: 96000005 [#1 ] SMP
[ 3.715599] Modules linked in:
[ 3.715608] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.0-12170-g60894882155f-dirty #77
[ 3.723937] Hardware name: ZynqMP ZCU102 Rev1.0 (DT)
[ 3.723942] pstate: 80000085 (Nzcv daIf -PAN -UAO -TCO BTYPE=--)
[ 3.723956] pc : xilinx_dpdma_irq_handler+0x418/0x560
[ 3.793049] lr : xilinx_dpdma_irq_handler+0x3d8/0x560
[ 3.798089] sp : ffffffc01186bdf0
[ 3.801388] x29: ffffffc01186bdf0 x28: ffffffc011836f28
[ 3.806692] x27: ffffff8023e0ac80 x26: 0000000000000080
[ 3.811996] x25: 0000000008000408 x24: 0000000000000003
[ 3.817300] x23: ffffffc01186be70 x22: ffffffc011291740
[ 3.822604] x21: 0000000000000000 x20: 0000000008000408
[ 3.827908] x19: 0000000000000000 x18: 0000000000000010
[ 3.833212] x17: 0000000000000000 x16: 0000000000000000
[ 3.838516] x15: 0000000000000000 x14: ffffffc011291740
[ 3.843820] x13: ffffffc02eb4d000 x12: 0000000034d4d91d
[ 3.849124] x11: 0000000000000040 x10: ffffffc0112d2d48
[ 3.854428] x9 : ffffffc0112d2d40 x8 : ffffff8021c00268
[ 3.859732] x7 : 0000000000000000 x6 : ffffffc011836000
[ 3.865036] x5 : 0000000000000003 x4 : 0000000000000000
[ 3.870340] x3 : 0000000000000001 x2 : 0000000000000000
[ 3.875644] x1 : 0000000000000000 x0 : 000000000000012c
[ 3.880948] Call trace:
[ 3.883382] xilinx_dpdma_irq_handler+0x418/0x560
[ 3.888079] __handle_irq_event_percpu+0x5c/0x178
[ 3.892774] handle_irq_event_percpu+0x34/0x98
[ 3.897210] handle_irq_event+0x44/0xb8
[ 3.901030] handle_fasteoi_irq+0xd0/0x190
[ 3.905117] generic_handle_irq+0x30/0x48
[ 3.909111] __handle_domain_irq+0x64/0xc0
[ 3.913192] gic_handle_irq+0x78/0xa0
[ 3.916846] el1_irq+0xc4/0x180
[ 3.919982] cpuidle_enter_state+0x134/0x2f8
[ 3.924243] cpuidle_enter+0x38/0x50
[ 3.927810] call_cpuidle+0x1c/0x40
[ 3.931290] do_idle+0x20c/0x270
[ 3.934502] cpu_startup_entry+0x28/0x58
[ 3.938410] rest_init+0xbc/0xcc
[ 3.941631] arch_call_rest_init+0x10/0x1c
[ 3.945718] start_kernel+0x51c/0x558
Fixes: 7cbb0c63dequanyang.wang@windriver.com >
Link: https://lore.kernel.org/r/20210430064041.4058180-1-quanyang.wang@windriver.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2021-06-23 14:42:40 +02:00
Laurent Pinchart
db010ba54a
dmaengine: xilinx: dpdma: Fix race condition in done IRQ
...
[ Upstream commit 868833fbffbe51c487df4f95d4de9194264a4b30 ]
The active descriptor pointer is accessed from different contexts,
including different interrupt handlers, and its access must be protected
by the channel's lock. This wasn't done in the done IRQ handler. Fix it.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Link: https://lore.kernel.org/r/20210307040629.29308-3-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2021-04-28 13:40:01 +02:00
Laurent Pinchart
e8d9a93ec4
dmaengine: xilinx: dpdma: Fix descriptor issuing on video group
...
[ Upstream commit 1cbd44666216278bbb6a55bcb6b9283702171c77 ]
When multiple channels are part of a video group, the transfer is
triggered only when all channels in the group are ready. The logic to do
so is incorrect, as it causes the descriptors for all channels but the
last one in a group to not being pushed to the hardware. Fix it.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Link: https://lore.kernel.org/r/20210307040629.29308-2-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2021-04-28 13:40:01 +02:00
Shravya Kumbham
d4a7eb9fbf
dmaengine: xilinx_dma: fix mixed_enum_type coverity warning
...
commit 2d5efea64472469117dc1a9a39530069e95b21e9 upstream.
Typecast the fls(width -1) with (enum dmaengine_alignment) in
xilinx_dma_chan_probe function to fix the coverity warning.
Addresses-Coverity: Event mixed_enum_type.
Fixes: 9cd4360de6shravya.kumbham@xilinx.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1608722462-29519-4-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org >
2021-01-17 14:17:02 +01:00
Shravya Kumbham
c16e7cfc1b
dmaengine: xilinx_dma: fix incompatible param warning in _child_probe()
...
commit faeb0731be0a31e2246b21a85fa7dabbd750101d upstream.
In xilinx_dma_child_probe function, the nr_channels variable is
passed to of_property_read_u32() which expects an u32 return value
pointer. Modify the nr_channels variable type from int to u32 to
fix the incompatible parameter coverity warning.
Addresses-Coverity: Event incompatible_param.
Fixes: 1a9e7a03c7shravya.kumbham@xilinx.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1608722462-29519-3-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org >
2021-01-17 14:17:02 +01:00
Shravya Kumbham
e72371fab4
dmaengine: xilinx_dma: check dma_async_device_register return value
...
commit 99974aedbd73523969afb09f33c6e3047cd0ddae upstream.
dma_async_device_register() can return non-zero error code. Add
condition to check the return value of dma_async_device_register
function and handle the error path.
Addresses-Coverity: Event check_return.
Fixes: 9cd4360de6shravya.kumbham@xilinx.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1608722462-29519-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org >
2021-01-17 14:17:02 +01:00
Matthew Murrian
96d5d884f7
dmaengine: xilinx_dma: Fix SG capability check for MCDMA
...
The SG capability is inherently present with Multichannel DMA operation.
The register used to check for this capability with other DMA driver types
is not defined for MCDMA.
Fixes: 6ccd692bfbmatthew.murrian@goctsi.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1604473206-32573-4-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-11-09 17:54:22 +05:30
Matthew Murrian
c8ae793299
dmaengine: xilinx_dma: Fix usage of xilinx_aximcdma_tx_segment
...
Several code sections incorrectly use struct xilinx_axidma_tx_segment
instead of struct xilinx_aximcdma_tx_segment when operating as
Multichannel DMA. As their structures are similar, this just works.
Fixes: 6ccd692bfbmatthew.murrian@goctsi.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1604473206-32573-3-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-11-09 17:54:22 +05:30
Marc Ferland
0ba2df09f1
dmaengine: xilinx_dma: use readl_poll_timeout_atomic variant
...
The xilinx_dma_poll_timeout macro is sometimes called while holding a
spinlock (see xilinx_dma_issue_pending() for an example) this means we
shouldn't sleep when polling the dma channel registers. To address it
in xilinx poll timeout macro use readl_poll_timeout_atomic instead of
readl_poll_timeout variant.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1604473206-32573-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-11-09 17:54:22 +05:30
Vinod Koul
2997ced4ec
dmaengine: zynqmp_dma: fix kernel-doc style for tasklet
...
Commit f19a11d40af19a11d40amichal.simek@xilinx.com >
Link: https://lore.kernel.org/r/20201007083113.567559-5-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-10-08 15:18:46 +05:30
Vinod Koul
d11913f2fb
dmaengine: xilinx_dma: fix kernel-doc style for tasklet
...
Commit f19a11d40af19a11d40amichal.simek@xilinx.com >
Link: https://lore.kernel.org/r/20201007083113.567559-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-10-08 15:18:43 +05:30
Allen Pais
b1839e7c2a
dmaengine: xilinx: dpdma: convert tasklets to use new tasklet_setup() API
...
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier <romain.perier@gmail.com >
Signed-off-by: Allen Pais <apais@linux.microsoft.com >
Link: https://lore.kernel.org/r/20201006050458.221329-2-allen.lkml@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-10-07 15:22:09 +05:30
Allen Pais
f19a11d40a
dmaengine: xilinx: convert tasklets to use new tasklet_setup() API
...
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.
Signed-off-by: Romain Perier <romain.perier@gmail.com >
Signed-off-by: Allen Pais <allen.lkml@gmail.com >
Link: https://lore.kernel.org/r/20200831103542.305571-33-allen.lkml@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-09-18 12:19:07 +05:30
Krzysztof Kozlowski
b0ef489e2a
dmaengine: xilinx: Simplify with dev_err_probe()
...
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org >
Link: https://lore.kernel.org/r/20200828152637.16903-3-krzk@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-09-03 12:38:59 +05:30
Wei Yongjun
144ceb27d7
dmaengine: xilinx: dpdma: Make symbol 'dpdma_debugfs_reqs' static
...
The sparse tool complains as follows:
drivers/dma/xilinx/xilinx_dpdma.c:349:37: warning:
symbol 'dpdma_debugfs_reqs' was not declared. Should it be static?
This variable is not used outside of xilinx_dpdma.c, so this commit
marks it static.
Fixes: 1d220435cahulkci@huawei.com >
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com >
Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com >
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Link: https://lore.kernel.org/r/20200818112217.43816-1-weiyongjun1@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-08-19 09:54:38 +05:30
Laurent Pinchart
1d220435ca
dmaengine: xilinx: dpdma: Add debugfs support
...
Expose statistics to debugfs when available. This helps debugging issues
with the DPDMA driver.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com >
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Link: https://lore.kernel.org/r/20200812171228.9751-1-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-08-17 11:20:49 +05:30
Laurent Pinchart
bc227385eb
dmaengine: xilinx: dpdma: Fix kerneldoc warning
...
Document the struct xilinx_dpdma_chan desc field to fix a kerneldoc
undocumented member warning (which can be reproduced by compiling with
W=1).
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Link: https://lore.kernel.org/r/20200722161747.30048-1-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-07-22 22:01:13 +05:30
Vinod Koul
ea55b6a349
dmaengine: xilinx: dpdma: add missing kernel doc
...
xilinx_dpdma_sw_desc_set_dma_addrs() documentation is missing describing
'xdev', so add it
drivers/dma/xilinx/xilinx_dpdma.c:313: warning: Function parameter or
member 'xdev' not described in 'xilinx_dpdma_sw_desc_set_dma_addrs'
Link: https://lore.kernel.org/r/20200718135201.191881-2-vkoul@kernel.org
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-07-22 22:00:51 +05:30
Vinod Koul
1c1df90871
dmaengine: xilinx: dpdma: remove comparison of unsigned expression
...
xilinx_dpdma_config() channel id is unsigned int and compares with
ZYNQMP_DPDMA_VIDEO0 which is zero, so remove this comparison
drivers/dma/xilinx/xilinx_dpdma.c:1073:15: warning: comparison of
unsigned expression in ‘>= 0’ is always true [-Wtype-limits] if
(chan->id >= ZYNQMP_DPDMA_VIDEO0 && chan->id <= ZYNQMP_DPDMA_VIDEO2)
Link: https://lore.kernel.org/r/20200718135201.191881-1-vkoul@kernel.org
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-07-22 22:00:19 +05:30
Hyun Kwon
7cbb0c63de
dmaengine: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver
...
The ZynqMP DisplayPort subsystem includes a DMA engine called DPDMA with
6 DMa channels (4 for display and 2 for audio). This driver exposes the
DPDMA through the dmaengine API, to be used by audio (ALSA) and display
(DRM) drivers for the DisplayPort subsystem.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com >
Signed-off-by: Tejas Upadhyay <tejasu@xilinx.com >
Signed-off-by: Michal Simek <michal.simek@xilinx.com >
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com >
Link: https://lore.kernel.org/r/20200717013337.24122-4-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-07-17 11:37:59 +05:30
Rafał Hibner
ee63fab3cc
dmaengine: zynqmp_dma: Move list_del inside zynqmp_dma_free_descriptor.
...
List elements are not formally removed from list during zynqmp_dma_reset.
Signed-off-by: Rafal Hibner <rafal.hibner@secom.com.pl >
Link: https://lore.kernel.org/r/20200506102844.2259-1-rafal.hibner@secom.com.pl
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-05-15 11:21:11 +05:30
Sebastian von Ohr
b269426011
dmaengine: xilinx_dma: Add missing check for empty list
...
The DMA transfer might finish just after checking the state with
dma_cookie_status, but before the lock is acquired. Not checking
for an empty list in xilinx_dma_tx_status may result in reading
random data or data corruption when desc is written to. This can
be reliably triggered by using dma_sync_wait to wait for DMA
completion.
Signed-off-by: Sebastian von Ohr <vonohr@smaract.com >
Tested-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/20200303130518.333-1-vonohr@smaract.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-04-15 21:42:11 +05:30
Radhey Shyam Pandey
14ccf0aab4
dmaengine: xilinx_dma: In dma channel probe fix node order dependency
...
In overlay application we noticed that dma channel node probe order is
inverted i.e s2mm channel is probed first followed by mm2s channel. The
reason for this inversion is fdtoverlay utility which uses a function
called fdt_add_subnode(*). It stores the subnodes after the properties,
this has the effect of inserting the new subnode before any others and
the end result is a reversal.
Because of this inverted channel probe order, the node probed first is
assigned a '0' index instead of Channel ID should be '0' for tx and '1'
for rx and dmatest client using the DT convention fails in dma transfer
as channel are swapped.
To fix above behavior and make channel assignment index independent
of probe order, always assign mm2s channel at '0' index and the s2mm
channel at IP specific fixed offset derived from the max_channels
count.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1580388865-9960-3-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-02-25 11:17:54 +05:30
Radhey Shyam Pandey
04c2bc2bed
dmaengine: xilinx_dma: Extend dma_config structure to store max channel count
...
Extend dma_config structure to store the max channel count. This input is
used to populate dma device channel nodes at the fixed offset. It serves
as a preparatory patch for removing dma channel DT node order dependency,
added in the subsequent commit.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1580388865-9960-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-02-25 11:17:53 +05:30
Radhey Shyam Pandey
2575cb81a9
dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all
...
Reset DMA channel after stop to ensure that pending transfers and FIFOs
in the datapath are flushed or completed. It also cleanup the terminate
path and removes stop for the cyclic mode as after the reset stop is not
required. This fixes intermittent data verification failure when xilinx
dma test the client is stressed and loaded/unloaded multiple times.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1580283909-32678-1-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-02-24 22:23:48 +05:30
Matthias Fend
cc88525ebf
dmaengine: zynqmp_dma: fix burst length configuration
...
Since the dma engine expects the burst length register content as
power of 2 value, the burst length needs to be converted first.
Additionally add a burst length range check to avoid corrupting unrelated
register bits.
Signed-off-by: Matthias Fend <matthias.fend@wolfvision.net >
Link: https://lore.kernel.org/r/20200115102249.24398-1-matthias.fend@wolfvision.net
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2020-01-21 14:49:30 +05:30
Vinod Koul
bb5a471de9
Merge branch 'fixes' into next
2019-11-14 16:02:51 +05:30
Radhey Shyam Pandey
6ccd692bfb
dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support
...
Add support for AXI Multichannel Direct Memory Access (AXI MCDMA)
core, which is a soft Xilinx IP core that provides high-bandwidth
direct memory access between memory and AXI4-Stream target peripherals.
The AXI MCDMA core provides scatter-gather interface with multiple
independent transmit and receive channels. The driver supports
device_prep_slave_sg slave transfer mode.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1571763622-29281-7-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-11-06 22:38:02 +05:30
Radhey Shyam Pandey
c2f6b67db2
dmaengine: xilinx_dma: Extend dma_config struct to store irq routine handle
...
Extend dma_config structure to store irq routine handle. It enables runtime
handler selection based on xdma_ip_type and serves as preparatory patch for
adding MCDMA IP support.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Suggested-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/1571763622-29281-6-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-11-06 22:38:01 +05:30
Radhey Shyam Pandey
bcb2dc7b6c
dmaengine: xilinx_dma: Remove axidma multichannel mode support
...
The AXI DMA multichannel support is deprecated in the IP and it is no
longer actively supported. For multichannel support, refer to the AXI
multichannel direct memory access IP product guide(PG228) and MCDMA
driver. So inline with it remove axidma multichannel support from
from the driver.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1571763622-29281-5-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-11-06 22:38:01 +05:30
Nicholas Graumann
8a631a5a0f
dmaengine: xilinx_dma: Clear desc_pendingcount in xilinx_dma_reset
...
Whenever we reset the channel, we need to clear desc_pendingcount
along with desc_submitcount. Otherwise when a new transaction is
submitted, the irq coalesce level could be programmed to an incorrect
value in the axidma case.
This behavior can be observed when terminating pending transactions
with xilinx_dma_terminate_all() and then submitting new transactions
without releasing and requesting the channel.
Signed-off-by: Nicholas Graumann <nick.graumann@gmail.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1571150904-3988-8-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-20 19:35:27 +05:30
Nicholas Graumann
722b9e6d7e
dmaengine: xilinx_dma: Print debug message when no free tx segments
...
The driver should not run out of tx segments in normal operation. But,
if the user attempts to prepare a transaction with a large sg list,
the driver may not have enough free segments to accommodate the request.
Log a message at the debug level to inform the user in case they are
experiencing issues.
Signed-off-by: Nicholas Graumann <nick.graumann@gmail.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1571150904-3988-7-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-20 19:35:27 +05:30
Nicholas Graumann
d8bae21a48
dmaengine: xilinx_dma: Add callback_result support
...
Take advantage of dmaengine_desc_get_callback_invoke which allows either
a callback or callback_result to be specified. This can be useful when
using the AXI DMA transfer unknown quantities of data where the residue
contained in the result can be used to calculate the number of bytes
transferred.
Signed-off-by: Nicholas Graumann <nick.graumann@gmail.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1571150904-3988-6-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-20 19:35:27 +05:30
Nicholas Graumann
a575d0b4e6
dmaengine: xilinx_dma: Introduce xilinx_dma_get_residue
...
Introduce a function that can calculate residues for IPs that support it:
AXI DMA and CDMA.
Signed-off-by: Nicholas Graumann <nick.graumann@gmail.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1571150904-3988-5-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-20 19:35:27 +05:30
Radhey Shyam Pandey
95f68c6262
dmaengine: xilinx_dma: Remove residue from channel data
...
There is no use of storing channel data residue field. So clean it up.
In tx_status simply pass calculated residue to dma_set_residue.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1571150904-3988-4-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-20 19:35:27 +05:30
Nicholas Graumann
0f45e75e33
dmaengine: xilinx_dma: Merge get_callback and _invoke
...
The dma api provides a single interface to get the appropriate callback
and invoke it directly. Prefer using it.
Signed-off-by: Nicholas Graumann <nick.graumann@gmail.com >
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1571150904-3988-3-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-20 19:35:27 +05:30
Radhey Shyam Pandey
005a017926
dmaengine: xilinx_dma: Remove desc_callback_valid check
...
In descriptor cleanup the call to desc_callback_valid can be safely
removed as both callback pointers i.e callback_result and callback
are anyway checked in invoke(). There is no much benefit in having
redundant checks.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Signed-off-by: Nicholas Graumann <nick.graumann@gmail.com >
Reviewed-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com >
Link: https://lore.kernel.org/r/1571150904-3988-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-20 19:35:26 +05:30
Radhey Shyam Pandey
6c6de1ddb1
dmaengine: xilinx_dma: Fix control reg update in vdma_channel_set_config
...
In vdma_channel_set_config clear the delay, frame count and master mask
before updating their new values. It avoids programming incorrect state
when input parameters are different from default.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Acked-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com >
Signed-off-by: Michal Simek <michal.simek@xilinx.com >
Link: https://lore.kernel.org/r/1569495060-18117-3-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-15 15:41:55 +05:30
Radhey Shyam Pandey
68fe2b520c
dmaengine: xilinx_dma: Fix 64-bit simple AXIDMA transfer
...
In AXI DMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. It fixes simple AXI DMA operation
mode using 64-bit addressing.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1569495060-18117-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-15 15:41:55 +05:30
Radhey Shyam Pandey
944879ba4c
dmaengine: xilinx_dma: Remove clk_get error message for probe defer
...
In dma probe, the driver checks for devm_clk_get return and print error
message in the failing case. However for -EPROBE_DEFER this message is
confusing so avoid it.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Signed-off-by: Michal Simek <michal.simek@xilinx.com >
Link: https://lore.kernel.org/r/1569495060-18117-5-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-15 15:41:46 +05:30
Radhey Shyam Pandey
a8bd475428
dmaengine: xilinx_dma: use devm_platform_ioremap_resource()
...
Replace the chain of platform_get_resource() and devm_ioremap_resource()
with devm_platform_ioremap_resource(). It simplifies the flow and there
is no functional change.
Fixes below cocinelle warning-
WARNING: Use devm_platform_ioremap_resource for xdev -> regs
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com >
Link: https://lore.kernel.org/r/1569495060-18117-4-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org >
2019-10-15 15:41:46 +05:30
