From Dinh Nguyen:
Updates to dts file structure for Altera's SOCFPGA
* Does not include any new bindings or bindings change
* Add dts file for a SOCFPGA with an Arria V FPGA
* Add a clocks property for the TWD timer
* Add support for Terasic SocKit Board which has Cyclone5 FPGA
* From Steffen Trumtrar:
"This series includes some minor cleanups (indentation and clock labels) and
reorders the socfpga dts hierarchy from:
socfpga.dtsi
-> socfpga_$board.dts
-> socfpga_$otherboard.dts
to
socfpga.dtsi
-> socfpga_cyclone5.dtsi
--> socfpga_cyclone5_$board.dts
--> socfpga_cyclone5_$otherboard.dts
"
* tag 'socfpga-dts-updates-for-v3.13' of git://git.rocketboards.org/linux-socfpga-next:
dts: socfpga: Add support for Altera's SOCFPGA Arria V board
ARM: socfpga: dts: fix s2f_* clock name
ARM: socfpga: dts: cleanup indentation
ARM: socfpga: dts: Add support for terasic SoCkit
ARM: socfpga: dts: Move common nodes to cyclone5 dtsi
arm: socfpga: Add clock for smp_twd timer
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Basic devicetree files for the rk3188 SoC. Also provided is a board
dts file for the upcoming Radxa Rock board using this SoC.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
RK2928 and RK3066 contain a dw_apb timer component, while the rk3188 uses
a slightly similar but still different timer component. But all of them
support the ARM-global-timer that got added as clocksource driver recently.
So enable support for it to get a working clocksource for rk3188.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rk3188 SoC shares a lot of peripherals with the rk3066 SoC,
but not all. Therefore move the common parts to a shared dtsi.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
From Simon Horman:
* renesas/dt2: (21 commits)
ARM: shmobile: bockw: fixup ether node naming
ARM: shmobile: r8a7779: add irqpin default status on DTSI
ARM: shmobile: marzen: fixup SMSC IRQ number on DTS
ARM: shmobile: bockw: add SMSC support on DTS
ARM: shmobile: r8a7778: add renesas_intc_irqpin support on DTSI
ARM: shmobile: r8a7791 SMP device tree node
ARM: shmobile: r8a7791 Arch timer device tree node
ARM: shmobile: r8a7791 IRQC device tree node
ARM: shmobile: armadillo800eva-reference: add SDHI and MMCIF interfaces
ARM: shmobile: armadillo-reference: Add PWM backlight node to DT
ARM: shmobile: r8a73a4: add a DT node for the DMAC
ARM: shmobile: r8a7790: add I2C DT nodes
ARM: shmobile: only enable used I2C interfaces in DT on all Renesas boards
ARM: shmobile: r8a7778: add usb phy power control function
ARM: shmobile: r8a7778: add USBHS clock
ARM: shmobile: r8a7791 CMT support
ARM: shmobile: r8a7791 SCIF support
ARM: shmobile: Initial r8a7791 SoC support
ARM: shmobile: r8a7778: add SSI/SRU clock support
ARM: shmobile: r8a7790: Add DU and LVDS clocks
...
Signed-off-by: Kevin Hilman <khilman@linaro.org>
These were used only in one intermediate variant of the pinctrl
driver but forgotten in the dtsi file. rockchip,config properties are
neither part of the actual binding nor handled by the pinctrl driver
at all, so remove them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
CONFIG_LOCAL_TIMERS was removed in february, so the twd never gets
selected. Fix this by making the twd depend on SMP directly.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
I've tested the serial, MMC, smsc911x, wl12xx, and off-idle support
with the pinctrl patches, so it probably works better than the
board-*.c files ever did. Also the board-omap3evm.c file is broken
for the DSS, and has been for a while. Patches are welcome to fix
it in this .dts file, let's just drop the board-*.c file for this.
Note that off-idle currently requires doing request_irq() on the
wake-up pin from pinctrl-single IRQ domain until we can handle
that in some Linux generic way.
[tony@atomide.com: updated for make dtbs build fix]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Looks like the main difference between the TMDSEVM3530 and
TMDSEVM3730 is just the omap processor:
http://www.ti.com/tool/tmdsevm3530http://www.ti.com/tool/tmdsevm3730
So let's add a common file for the EVMs, and fix the description
for the omap3-evm.dst as that's clearly for the TMDSEVM3530
since it includes omap34xx.dtsi. It cannot support the TMDSEVM3730
properly, and we need a separate file for that in the following
patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need the fixes in v3.12-rc5, dts changes in omap-for-v3.13/dt, and
the platform data quirk changes in omap-for-v3.13/quirk to start
removing omap3 board files without breaking things.
initcalls need to have platform specific checks so they are not run in
multi-platform builds.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Add hwmod for USBSS and the OCP2SCP for AM437x.
AM437x has got 2 instances of USBSS.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Pull ARM fixes from Russell King:
"Some more ARM fixes, nothing particularly major here. The biggest
change is to fix the SMP_ON_UP code so that it works with TI's Aegis
cores"
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7851/1: check for number of arguments in syscall_get/set_arguments()
ARM: 7846/1: Update SMP_ON_UP code to detect A9MPCore with 1 CPU devices
ARM: 7845/1: sharpsl_param.c: fix invalid memory access for pxa devices
ARM: 7843/1: drop asm/types.h from generic-y
ARM: 7842/1: MCPM: don't explode if invoked without being initialized first
Enable wm8904 codec on at91sam9n12ek board, which is connect
to i2c0 bus with 0x1a as address.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The KVM_HPAGE_DEFINES are a little artificial on ARM, since the huge
page size is statically defined at compile time and there is only a
single huge page size.
Now when the main kvm code relying on these defines has been moved to
the x86 specific part of the world, we can get rid of these.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Build AM43x power domain, clock domain and hwmod data.
Many of AM43x IP's and interconnects are similar as that in AM335x,
hence AM335x hwmod data is being reused with necessary changes.
Earlier the plan was to reuse AM335x specific PRCM code, but as AM43x
PRCM register layout is much similar to OMAP4/5, AM335x PRCM is
divorced and instead married with OMAP4/5 PRCM for AM43x.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Reuse OMAP4 operations on AM43x.
Context related ops are not used on AM43x, as this would not add value
when using DT and AM43x is DT only boot. This additionally helps not to
add context register offset for each hwmod.
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add hwmod support for IP's that are present in AM43x, but not in AM335x.
AM43x additional ones added here are,
1. synctimer
2. timer8-11
3. ehrpwm3-5
4. spi2-4
5. gpio4-5
AM43x pruss interconnect which is different as compared to AM335x, has
been taken care.
And register offsets for same hwmod's shared with AM335x is different,
AM43x register offsets are updated appropriately.
ocp clock of those in l4_wkup is fed from "sys_clkin_ck" instead of
"dpll_core_m4_div2_ck", so "ocpif" for those in AM43x l4_wkup has been
added seperately.
hwmod's has been added for those that have main clock (wkup_m3, control,
gpio0) and clock domain (l4_hs) different from AM335x. debugss and
adc_tsc that have different clocks and clockdomains repectively has not
been added due to the reasons mentioned below.
AM43x also has IP's like qspi, hdq1w, vpfe, des, rng, usb, dss, debugss,
adc_tsc. These are not handled here due to both/either of following
reasons,
1. To avoid churn; most of them don't have DT bindings, which would
necessitate adding address space in hwmod, which any way would have
to be removed once DT bindings happen with driver support.
2. patches would come in from sources other than the author
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the data file to describe clock domains in AM43x SoC.
OMAP4 clockdomain operations is being reused here.
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add the data file to describe all power domains in AM43x SoC.
OMAP4 powerdomain operations is being reused here.
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Hwmod common to AM43x and AM335x has register offsets different. It is
now updated based on SoC detection at run time, hence remove statically
initialized ones.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Most of IP's in AM335x is present on AM43x and so in those cases both
will use same hwmod database (except for a few cases where clock related
details differ), but there is difference w.r.t register offset between
these. Update register offsets at runtime based on the SoC detected to
help in sharing otherwise same hwmod.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
AM335x and AM43x have most of the IP's and interconnect's similar.
Instead of adding redundant hwmod data, move interconnects and hwmod
similar between AM335x and AM43x to a common location. This helps in
reuse on AM43x.
AM335x interconnects that has difference and not present in AM43x are
not moved. ocp clock of those in l4_wkup is fed from a different source
for AM43x. Also pruss interconnect is different.
AM335x hwmod's that has difference other than prcm register offsets
(difference is in clocks of wkup_m3, control, gpio0, debugss and clock
domain of l4_hs, adc_tsc as compared to AM43x) and those that are not
present in AM43x are not moved.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Most of the AM43x CM reg address offsets are with MSB bit '1' (on
16-bit value) leading to arithmetic miscalculations while calculating
CLOCK ENABLE register's address because cm_inst field was a type of
"const s16", so make it "const u16".
Also modify relevant functions so as to take care of the above.
[afzal@ti.com: fixup and cleanup]
Signed-off-by: Ankur Kishore <a-kishore@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This fixes a long-standing Integrator/CP regression from
commit 870e2928cf
"ARM: integrator-cp: convert use CLKSRC_OF for timer init"
When this code was introduced, the both aliases pointing the
system to use timer1 as primary (clocksource) and timer2
as secondary (clockevent) was ignored, and the system would
simply use the first two timers found as clocksource and
clockevent.
However this made the system timeline accelerate by a
factor x25, as it turns out that the way the clocking
actually works (totally undocumented and found after some
trial-and-error) is that timer0 runs @ 25MHz and timer1
and timer2 runs @ 1MHz. Presumably this divider setting
is a boot-on default and configurable albeit the way to
configure it is not documented.
So as a quick fix to the problem, let's mark timer0 as
disabled, so the code will chose timer1 and timer2 as it
used to.
This also deletes the two aliases for the primary and
secondary timer as they have been superceded by the
auto-selection
Cc: stable@vger.kernel.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
In ftrace_syscall_enter(),
syscall_get_arguments(..., 0, n, ...)
if (i == 0) { <handle ORIG_r0> ...; n--;}
memcpy(..., n * sizeof(args[0]));
If 'number of arguments(n)' is zero and 'argument index(i)' is also zero in
syscall_get_arguments(), none of arguments should be copied by memcpy().
Otherwise 'n--' can be a big positive number and unexpected amount of data
will be copied. Tracing system calls which take no argument, say sync(void),
may hit this case and eventually make the system corrupted.
This patch fixes the issue both in syscall_get_arguments() and
syscall_set_arguments().
Cc: <stable@vger.kernel.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Pull ARM SoC fixes from Olof Johansson:
"A small batch of fixes this week, mostly OMAP related. Nothing stands
out as particularly controversial.
Also a fix for a 3.12-rc1 timer regression for Exynos platforms,
including the Chromebooks"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: exynos: dts: Update 5250 arch timer node with clock frequency
ARM: OMAP2: RX-51: Add missing max_current to rx51_lp5523_led_config
ARM: mach-omap2: board-generic: fix undefined symbol
ARM: dts: Fix pinctrl mask for omap3
ARM: OMAP3: Fix hardware detection for omap3630 when booted with device tree
ARM: OMAP2: gpmc-onenand: fix sync mode setup with DT
Without the "clock-frequency" property in arch timer node, could able
to see the below crash dump.
[<c0014e28>] (unwind_backtrace+0x0/0xf4) from [<c0011808>] (show_stack+0x10/0x14)
[<c0011808>] (show_stack+0x10/0x14) from [<c036ac1c>] (dump_stack+0x7c/0xb0)
[<c036ac1c>] (dump_stack+0x7c/0xb0) from [<c01ab760>] (Ldiv0_64+0x8/0x18)
[<c01ab760>] (Ldiv0_64+0x8/0x18) from [<c0062f60>] (clockevents_config.part.2+0x1c/0x74)
[<c0062f60>] (clockevents_config.part.2+0x1c/0x74) from [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c)
[<c0062fd8>] (clockevents_config_and_register+0x20/0x2c) from [<c02b8e8c>] (arch_timer_setup+0xa8/0x134)
[<c02b8e8c>] (arch_timer_setup+0xa8/0x134) from [<c04b47b4>] (arch_timer_init+0x1f4/0x24c)
[<c04b47b4>] (arch_timer_init+0x1f4/0x24c) from [<c04b40d8>] (clocksource_of_init+0x34/0x58)
[<c04b40d8>] (clocksource_of_init+0x34/0x58) from [<c049ed8c>] (time_init+0x20/0x2c)
[<c049ed8c>] (time_init+0x20/0x2c) from [<c049b95c>] (start_kernel+0x1e0/0x39c)
THis is because the Exynos u-boot, for example on the Chromebooks, doesn't set
up the CNTFRQ register as expected by arch_timer. Instead, we have to specify
the frequency in the device tree like this.
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
[olof: Changed subject, added comment, elaborated on commit message]
Signed-off-by: Olof Johansson <olof@lixom.net>
From Tony Lindgren:
Few fixes for omap3 related hangs and errors that people have
noticed now that people are actually using the device tree
based booting for omap3.
Also one regression fix for timer compile for dra7xx when
omap5 is not selected, and a LED regression fix for n900.
* tag 'fixes-against-v3.12-rc3-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2: RX-51: Add missing max_current to rx51_lp5523_led_config
ARM: mach-omap2: board-generic: fix undefined symbol
ARM: dts: Fix pinctrl mask for omap3
ARM: OMAP3: Fix hardware detection for omap3630 when booted with device tree
ARM: OMAP2: gpmc-onenand: fix sync mode setup with DT
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds support for running Cortex-A7 guests on Cortex-A7 hosts.
As Cortex-A7 is architecturally compatible with A15, this patch is largely just
generalising existing code. Areas where 'implementation defined' behaviour
is identical for A7 and A15 is moved to allow it to be used by both cores.
The check to ensure that coprocessor register tables are sorted correctly is
also moved in to 'common' code to avoid each new cpu doing its own check
(and possibly forgetting to do so!)
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The T{0,1}SZ fields of TTBCR are 3 bits wide when using the long descriptor
format. Likewise, the T0SZ field of the HTCR is 3-bits. KVM currently
defines TTBCR_T{0,1}SZ as 3, not 7.
The T0SZ mask is used to calculate the value for the HTCR, both to pick out
TTBCR.T0SZ and mask off the equivalent field in the HTCR during
read-modify-write. The incorrect mask size causes the (UNKNOWN) reset value
of HTCR.T0SZ to leak in to the calculated HTCR value. Linux will hang when
initializing KVM if HTCR's reset value has bit 2 set (sometimes the case on
A7/TC2)
Fixing T0SZ allows A7 cores to boot and T1SZ is also fixed for completeness.
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
KVM does not have a notion of multiple clusters for CPUs, just a linear
array of CPUs. When using a system with cores in more than one cluster, the
current method for calculating the virtual MPIDR will leak the (physical)
cluster information into the virtual MPIDR. One effect of this is that
Linux under KVM fails to boot multiple CPUs that aren't in the 0th cluster.
This patch does away with exposing the real MPIDR fields in favour of simply
using the virtual CPU number (but preserving the U bit, as before).
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This patch adds support for lvds backlight on boards
i.MX6q-SabreSD and i.MX6dl-SabreSD
Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Otherwise we can get an error with some configs:
arch/arm/mach-omap2/timer.c:73: undefined reference to `omap_smc1'
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since commit ca91435 "ARM: EXYNOS: Remove unused board files",
s5p_device_ehci is not used anymore. Thus, s5p_device_ehci can
be removed. Also, unnecessary S5P_DEV_USB_EHCI option is removed.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
DWC3 enables USB3 functionality for OMAP5 boards,
it's safe to enable those drivers in omap2plus_defconfig.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
[tony@atomide.com: updated against other defconfig changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add this hwmod data to allow USB3 to work in OMAP5 boards.
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
[tony@atomide.com: updated to apply against Paul's changes]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
From Santosh Shilimkar:
SOC updates for Keystone II devices:
- Clock tree support
- Clock management support using PM core
- Keystone config update for EMDA with ack from Vinod
- Enable SPI and I2C drivers
* tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (510 commits)
ARM: keystone: Enable I2C and SPI bus support
ARM: keystone: Select TI_EDMA to be able to enable SPI driver
dma: Allow TI_EDMA selectable for ARCH_KEYSTONE
ARM: dts: keystone: Add the SPI nodes
ARM: dts: keystone: Add i2c device nodes
ARM: keystone: add PM domain support for clock management
ARM: keystone: Enable clock drivers
ARM: dts: keystone: Add clock phandle to UART nodes
ARM: dts: keystone: Add clock tree data to devicetree
+Linux 3.12-rc4
Signed-off-by: Kevin Hilman <khilman@linaro.org>
