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19 Commits

Author SHA1 Message Date
Leo Liu
1ee4478a26 drm/amdgpu: Disable UVD PG 
This causes problems with multiple suspend/resume cycles.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
 2015-09-23 17:23:39 -04:00
Alex Deucher
188a9bcd6c drm/amdgpu: add support for VCE 3.x on Fiji 
VCE on fiji is single pipe only.

Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:29 -04:00
David Zhang
974ee3db0f drm/amdgpu: Add Fiji support to the UVD 6.0 IP module 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:28 -04:00
David Zhang
1a5bbb6695 drm/amdgpu: Add Fiji support to the SDMA 3.0 IP module 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:27 -04:00
David Zhang
af15a2d51d drm/amdgpu: Add Fiji support to the GFX 8.0 IP module (v2) 
v2: agd5f: fix the rb setup.

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:27 -04:00
David Zhang
843908604d drm/amdgpu: Add Fiji support to the DCE 10.0 IP module (v2) 
v2: agd5f: fix up XDMA golden settings

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:26 -04:00
David Zhang
8e711e1a1a drm/amdgpu: Add Fiji support to SMC and DPM (v2) 
v2: agd5f: prepare for release

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:26 -04:00
David Zhang
aa8a3b5395 drm/amdgpu: Add Fiji support to IH module 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:24 -04:00
David Zhang
127a262853 drm/amdgpu: Add Fiji support to the GMC 8.5 IP module 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:24 -04:00
David Zhang
48299f95f7 drm/amdgpu: Add Fiji DID 0x7300 common support 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:23 -04:00
Jammy Zhou
2f7d10b393 drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2) 
Make the definitions common for all driver components

v2: fix kfd

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:21 -04:00
Marek Olšák
c7890fea04 drm/amdgpu: allow userspace to read more debug registers 
Feel free to suggest more.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:20 -04:00
Alex Deucher
7b92cdbfe2 drm/amdgpu: set proper index/data pair for smc regs on CZ (v2) 
v2: squash in later fix

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-07-16 12:39:40 -04:00
Alex Deucher
d8d090b711 drm/amdgpu: allocate ip_block_enabled memory in common code 
Remove duplication across asic families and make it symmetric
with the freeing of the code in amdgpu_device.c

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-29 11:21:52 -04:00
Sonny Jiang
b7a0776949 drm/amdgpu: enable vce powergating 
Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on
demand.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-06-10 11:54:16 -04:00
Alex Deucher
5732a94f18 drm/admgpu: move XDMA golden registers to dce code 
Already moved other display registers.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-10 09:13:21 -04:00
yanyang1
5fc3aeeb9e drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2) 
The structure is renamed and moved to amd_shared.h to make
the component independent.  This makes it easier to add
new components in the future.

v2: fix include path

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:51 -04:00
Sonny Jiang
564ea7900c drm/amdgpu: enable uvd dpm and powergating 
Enable UVD dpm (dynamic power management) and powergating.  UVD dpm dynamically scales the UVD
clocks on demand.  Powergating turns off the power to the block when it's not in use.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:48 -04:00
Alex Deucher
aaa36a976b drm/amdgpu: Add initial VI support 
This adds initial support for VI asics.  This
includes Iceland, Tonga, and Carrizo.  Our inital
focus as been Carrizo, so there are still gaps in
support for Tonga and Iceland, notably power
management.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-06-03 21:03:17 -04:00