As I found by chance while merging another patch, the usage of
a dma-mask in this DT node is wrong for multiple reasons:
- dma-masks are a Linux specific concept, not a general
hardware feature
- In DT, we use the "dma-ranges" property to describe how DMA
addresses related between devices.
- The 40-bit mask appears to be completely unnecessary here, as
the SoC cannot address that much memory anyway, so simply
asking for a 64-bit mask (as supported by the device) should
succeed anyway.
The patch to remove the parsing of the property is getting merged
through the crypto tree.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mvebu fixes for 4.12
Fix the interrupt description of the crypto node for device tree of
the Armada 7K/8K SoCs
* tag 'mvebu-fixes-4.12-1' of git://git.infradead.org/linux-mvebu:
arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes
Pull "mvebu dt64 for 4.13 (part 2)" from Gregory CLEMENT:
- use new clock binding for Armada 7K/8K
- add pinctrl on Armada 7K/8K
- add GPIO on Armada 7K/8K
- switch from GIC to ICU on CP110 (Armada 7K/8K)
- enable the mdio node on the mcbin (Armada 8K based board)
* tag 'mvebu-dt64-4.13-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K
arm64: dts: marvell: add gpio support for Armada 7K/8K
arm64: dts: marvell: add pinctrl support for Armada 7K/8K
arm64: dts: marvell: use new binding for the system controller on cp110
arm64: dts: marvell: remove *-clock-output-names on cp110
arm64: dts: marvell: use new bindings for xor clocks on ap806
arm64: dts: marvell: mcbin: enable the mdio node
Pull "ZTE arm64 device tree updates for 4.13" from Shawn Guo:
- Fix DTC unit_address_vs_reg warnings in OPP entries by replacing
'@' with '-' as the OPP nodes will never have a "reg" property.
* tag 'zte-dt64-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: zte: Use - instead of @ for DT OPP entries
This resolves a build error in the next/dt branch:
In file included from arch/arm64/boot/dts/mediatek/mt6797-evb.dts:16:0:
arch/arm64/boot/dts/mediatek/mt6797.dtsi:15:10: fatal error: dt-bindings/power/mt6797-power.h: No such file or directory
003f5d0c34 ("arm64: dts: mediatek: add clk and scp nodes for MT6797")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit modifies the Marvell EBU Armada 7K and 8K Device Tree files
to describe the ICU and GICP units, and use ICU interrupts for all
devices in the CP110 blocks.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Compiling the DT file with W=1, DTC warns like follows:
Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property
Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable gpio support for CP and AP on the Marvell Armada 7K/8K SoCs.
The Armada 8K has two CP110 blocks, each having two GPIO controllers.
However, in each CP110 block, one of the GPIO controller cannot be
used: in the master CP110, only the second GPIO controller can be used,
while on the slave CP110, only the first GPIO controller can be used.
On the other side, the Armada 7K has only one CP110, but both its GPIO
controllers can be used.
For this reason, the GPIO controllers are marked as "disabled" in the
armada-cp110-master.dtsi and armada-cp110-slave.dtsi files, and only
enabled in the per-SoC dtsi files.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable pinctrl support for CP and AP on the Armada 7K/8K SoCs.
The CP master being different between Armada 7k and Armada 8k. This
commit introduces the intermediates files armada-70x0.dtsi and
armada-80x0.dtsi.
These new files will provide different compatible strings depending of
the SoC family. They will also be the location for the pinmux
configuration at the SoC level.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The new binding for the system controller on cp110 moved the clock
controller into a subnode. This preliminary step will allow to add gpio
and pinctrl subnodes.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
New bindings are used for the system controller on the ap806, which
means all clock properties must be converted. Use the new bindings in
the xor nodes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Since the mdio nodes are disabled by default now, we should explicitly
enable these nodes at the board level when they are used. Enable the
cpm_mdio node for the 8040-mcbin.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Freescale arm64 device tree updates for 4.13:
- A series from NXP employee Li Yang that updates the copyright claims
to comply with company policy.
- A patch-set from Madalin Bucur that adds Data Path Acceleration
Architecture (DPAA) QBMan and FMan. Quite a few .dtsi files are
created for SoCs with different DPAA configuration to include the
devices as needed.
- Enable UHS-I SD and eMMC support for LS1046A and LS208xA RDB/QDS
boards.
- Enable TMU device for thermal management support on LS1088A.
- Update SATA device node for LS1088A with correct compatible and ECC
register bit.
- A few small random device tree updates.
* tag 'imx-dt64-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (22 commits)
arm64: dts: ls1088a: update sata node
dt-bindings: ahci-fsl-qoriq: add ls1088a chip name to the list
arm64: dts: ls1012a: Add coreclk
arm64: dts: ls1046a: Add dis_rxdet_inp3_quirk property to USB3 node
arm64: dts: ls208xa: disable SD UHS-I modes by default on RDB
arm64: dts: ls1043a: Add generic compatible string for I2C EEPROM
arm64: dts: add LS1046A DPAA FMan nodes
arm64: dts: add LS1043A DPAA FMan support
arm64: dts: add DPAA FMan nodes
arm64: dts: add LS1046A DPAA QBMan nodes
arm64: dts: add LS1043A DPAA QBMan nodes
arm64: dts: add DPAA QBMan portals
arm64: dts: ls1088a: Add TMU device tree support
arm64: dts: ls1088a: update the sata node
arm64: dts: Add flash node for ls1088a qds and rdb
arm64: dts: ls1088a: add esdhc node
arm64: dts: ls1012a: add eSDHC nodes
arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDS
arm64: dts: ls1046a: support SD UHS-I and eMMC HS200 on RDB
mmc: dt: add compatible into eSDHC required properties
...
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu dt64 for 4.13 (part 1)
- Improve the mcbin support (Armada 8040 based board): add sdhci and
the second 1G port
- Improve crypro nodes description on Aramda 7K/8K
- Use new binding for ap806 clocks
- Improve mdio nodes and add xmdio on Aramda 7K/8K
- Add second SGCI node on Armada 37xx
- Improve the description of the Armada 3720 DB board
* tag 'mvebu-dt64-4.13-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add xmdio nodes for 7k/8k
arm64: dts: marvell: add a comment on the cp110 slave node status
arm64: dts: marvell: remove cpm crypto nodes from dts files
arm64: dts: marvell: cp110: enable the crypto engine at the SoC level
arm64: dts: marvell: armada-3720-db: Add vqmmc regulator for SD slot
arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx
arm64: dts: marvell: armada-37xx: Use angle bracket for each register set
arm64: dts: marvell: armada-37xx: Align the compatible string
arm64: dts: marvell: armada-3720-db: Add information about the V2 board
arm64: dts: marvell: armada-3720-db: Sort the dts node alphabetically
arm64: dts: marvell: disable the mdio nodes by default
arm64: dts: marvell: explicitly enable the mdio nodes for 7k/8k DB
arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8k
arm64: dts: marvell: 8040-mcbin: Enable 1GB Ethernet
arm64: dts: marvell: cp110: add required clocks for mdio interface
arm64: dts: marvell: use new binding for the system controller on ap806
arm64: dts: marvell: remove clock-output-names on ap806
arm64: dts: marvell: add second 1G port on the Armada 8040 DB
arm64: dts: marvell: mcbin: add sdhci
arm64: dts: marvell: add clocks for Armada AP806 XOR engines
Signed-off-by: Olof Johansson <olof@lixom.net>
Second Round of Renesas ARM64 Based SoC DT Updates for v4.13
* Add reset control properties for audio to r9a779[56] SoCs
* Add add DMA for IIC_DVFS to r9a779[56] SoCs
* Add support for Salvator-XS and H3ULCB with R-Car H3 (r8a7795) ES2
* Add missing index to PWM pinctrl subnode name to Salvator-X board
* Add 12288000 for sound ADG to Salvator-X and ULCB boards
* tag 'renesas-arm64-dt2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7796: Add reset control properties for audio
arm64: dts: r8a7795: Add reset control properties for audio
arm64: dts: renesas: Add support for Salvator-XS with R-Car H3 ES2.0
arm64: dts: renesas: Add common Salvator-XS board support
arm64: dts: renesas: Extract common Salvator-X/XS board support
arm64: dts: salvator-x: Add missing index to PWM pinctrl subnode name
arm64: dts: r8a7795: h3ulcb: Add support for R-Car H3 ES2.0
arm64: dts: r8a7796: add DMA for IIC_DVFS
arm64: dts: r8a7795: add DMA for IIC_DVFS
arm64: dts: ulcb: add 12288000 for sound ADG
arm64: dts: salvator-x: add 12288000 for sound ADG
Signed-off-by: Olof Johansson <olof@lixom.net>
Qualcomm ARM64 Updates for v4.13
* Fix APQ8016 SBC WLAN LED
* Add MSM8996 CPU node
* Add MSM8992 SMEM and fixed regulator
* Fixup MSM8916 USB support
* tag 'qcom-arm64-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: apq8016-sbc: Correct WLAN LED default-trigger
arm64: dts: msm8996: Add CPU clock controller node
arm64: dts: smem enablement for msm8992
arm64: dts: msm8992 add fixed regulator
arm64: dts: qcom: Collapse usb support into one node
Signed-off-by: Olof Johansson <olof@lixom.net>
arm64: tegra: Device tree changes for v4.13-rc1
This adds the CCPLEX cluster on Tegra186, which is used to initiate CPU
frequency and voltage transitions.
Also included is a bit of cleanup for PCI related device tree content,
in preparation for a future DTC release that has additional checks for
the PCI bus.
* tag 'tegra-for-4.13-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: dts: nvidia: fix PCI bus dtc warnings
arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186
Signed-off-by: Olof Johansson <olof@lixom.net>
ARMv8 Vexpress/Juno DT updates for v4.13
1. Adds support for Coresight CPU debug MMIO interface on all Juno variants.
2. Enables support for few SMMUs on Juno which were previously disabled
waiting for IOMMU-backed DMA API support to be stabilised.
* tag 'juno-updates-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: enable some SMMUs
arm64: dts: juno: add coresight CPU debug nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Allwinner H5 DT changes for 4.13
Just like the H3, this is mostly about enabling the EMAC on the H5, and
also has a new board, the Orange Pi Zero Plus 2
* tag 'sunxi-dt-h5-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: h5: Add initial Orangepi Zero Plus 2 support
arm64: allwinner: h5: enable dwmac-sun8i for Nano Pi NEO2
arm64: allwinner: h5: enable dwmac-sun8i for Orange Pi Prime
arm64: allwinner: h5: sort the device nodes in / part for some boards
arm64: allwinner: h5: add support for NanoPi NEO2 board
arm64: allwinner: h5: add support for Orange Pi Prime board
arm64: allwinner: orangepi-pc2: Enable dwmac-sun8i
arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver
arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module
ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Signed-off-by: Olof Johansson <olof@lixom.net>
Allwinner arm64 DT changes for 4.13
Our usual arm64 changes. The most notable things are the EMAC support and
USB support enhancements. There's also support for the SoPine SoM, and the
OrangePi Win.
* tag 'sunxi-dt64-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: a64: Add initial Orangepi Win/WinPlus support
arm64: allwinner: a64: add device tree for SoPine with baseboard
arm64: allwinner: bananapi-m64: Enable dwmac-sun8i
arm64: allwinner: pine64-plus: Enable dwmac-sun8i
arm64: allwinner: pine64: Enable dwmac-sun8i
arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver
arm64: allwinner: sun50i-a64: Add dt node for the syscon control module
arm64: allwinner: a64: add DTSI file for SoPine SoM
arm64: allwinner: a64: Convert CCU raw number references to macros
arm64: dts: allwinner: pine64: Prepare optional UART nodes with pinctrl
arm64: allwinner: a64: enable RSB on A64
arm64: dts: allwinner: pine64: Add remaining UART aliases
arm64: dts: allwinner: a64: Add UART2 pin nodes
arm64: allwinner: a64: enable EHCI0/OHCI0 for Pine64
arm64: allwinner: a64: add EHCI0/OHCI0 nodes to A64 DTSI
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request contains Broadcom ARM64-based SoCs Device Tree changes for
4.13. Please note the following from Eric:
I've based this summary on the bcm2835-dt-next tag, to clarify what's in this
patch series, but it does require being careful since it involves a cross-merge
between branches.
- Anup documents the Broadcom Stingray binding, common clocks, adds initial
support for the Stingray DTSI and DTS files and adds support for the PL022,
PL330 and SP805
- Sandeep adds the clock nodes to the Stingray Device Tree nodes
- Pramod adds support for the NAND, pinctrl, GPIO to the Stingray Device Tree nodes
- Oza adds I2C Device Tree nodes to the Stingray DTSes
- Srinath adds PWM and SDHCI Device Tree nodes for the Stingray SoC
- Ravijeta adds support for the USB Dual Role PHY on Northstar 2
- Gerd starts adding references to the sdhost and sdhci controllers, and then
switches the sdcard to to use the SDHOST (faster than SDHCI)
- Stefan defines the BCM2837 thermal coefficients in order for the Raspberry Pi
thermal driver to work correctly
* tag 'arm-soc/for-4.13/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2: Add USB DRD PHY device tree node
ARM64: dts: bcm2837: Define CPU thermal coefficients
arm64: dts: Add PWM and SDHCI DT nodes for Stingray SOC
arm64: dts: Add PL022, PL330 and SP805 DT nodes for Stingray
arm64: dts: Add I2C DT nodes for Stingray SoC
arm64: dts: Add GPIO DT nodes for Stingray SOC
arm64: dts: Add pinctrl DT nodes for Stingray SOC
arm64: dts: Add NAND DT nodes for Stingray SOC
arm64: dts: Add clock DT nodes for Stingray SOC
arm64: dts: Initial DTS files for Broadcom Stingray SOC
dt-bindings: clk: Extend binding doc for Stingray SOC
dt-bindings: bcm: Add Broadcom Stingray bindings document
ARM: dts: bcm283x: switch from &sdhci to &sdhost
arm64: dts: bcm2837: add &sdhci and &sdhost
ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point
ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6)
Signed-off-by: Olof Johansson <olof@lixom.net>
UniPhier ARM64 SoC DT updates for v4.13
- specify timing delay properties of eMMC
- fix W=1 build warnings
- increase memory reserve size
- use SPDX License Identifier
- add new board support (LD11/LD20 global)
* tag 'uniphier-dt64-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add support for LD20 Global board
arm64: dts: uniphier: add support for LD11 Global board
arm64: dts: uniphier: use SPDX-License-Identifier
arm64: dts: uniphier: reserve more memory for LD11/LD20
arm64: dts: uniphier: fix simple-bus unit address format error
arm64: dts: uniphier: Use - instead of @ for DT OPP entries
arm64: dts: uniphier: add cdns, phy-dll-delay-sdclk(-hsmmc) for eMMC
arm64: dts: uniphier: add input-delay properties to Cadence eMMC node
Signed-off-by: Olof Johansson <olof@lixom.net>
Add device tree nodes for
mt8173:
- split USB SuperSpeed port in HighSpeed and SuperSpeed ports.
- move USB phy clocks up in hierarchy to met new bindings description
- move MDP nodes up in hierarchy to met new bindings description
mt6797:
- add basic SoC support
- add clock driver
- add power domain
dt-bindings:
- clean-up i2c binding description
- add binding for mt2701 i2c node
- add fallback compatible to scpsys binding description
- add bindings description for mt7622 and mt6796
* tag 'v4.12-next-dts64' of https://github.com/mbgg/linux-mediatek:
dt-bindings: mediatek: add bindings for MediaTek MT7622 SoC
arm64: dts: mt8173: Fix mdp device tree
dt-bindings: i2c: Add Mediatek MT2701 i2c binding
dt-bindings: i2c-mtk: Add mt7623 binding
dt-bindings: i2c-mtk: Delete bindings
dt-bindings: i2c-mt6577: Rename file to reflect bindings
dt-bindings: mtk-sysirq: Correct bindings for supported SoCs
arm64: dts: mediatek: add clk and scp nodes for MT6797
dt-bindings: mediatek: add MT6797 power dt-bindings
arm64: dts: mediatek: add mt6797 support
dt-bindings: mediatek: Add bindings for mediatek MT6797 Platform
arm64: dts: mt8173: move clock from phy node into port nodes
arm64: dts: mt8173: split usb SuperSpeed port into two ports
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung DeviceTree ARM64 update for v4.13:
1. Remove unneeded TE interrupt gpio property.
* tag 'samsung-dt64-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Remove the te-gpios property in the TM2 boards
Signed-off-by: Olof Johansson <olof@lixom.net>
Support for the new rk3399 firefly board; extending the pcie ranges to
make usage of pci switches possible; some more qos and pinctrl nodes on
rk3399; updates for the rk3399 cpu operating points including separate
opps for the higher rates OP1 variant of the chip and mmc-nodes for
the rk3328.
* tag 'v4.13-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: update common rk3399 operating points
arm64: dts: rockchip: introduce rk3399-op1 operating points
arm64: dts: rockchip: enable usb3 controllers on rk3399-firefly
arm64: dts: rockchip: add ethernet0 alias on rk3399
arm64: dts: rockchip: bring rk3399-firefly power-tree in line
arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs
arm64: dts: rockchip: extent IORESOURCE_MEM_64 of PCIe for rk3399
arm64: dts: rockchip: extent bus-ranges of PCIe for rk3399
arm64: dts: rockchip: add pinctrl settings for some rk3399 peripherals
arm64: dts: rockchip: add some missing qos nodes on rk3399
arm64: dts: rockchip: add support for firefly-rk3399 board
dt-bindings: add firefly-rk3399 board support
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the description of the xMDIO bus for the Marvell Armada 7k and
Marvell Armada 8k; for both CP110 slave and master. This bus is found
on Marvell Ethernet controllers and provides an interface with the
xMDIO bus.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The cryptographic engine found on the cp110 slave is disabled by default
because of some known limitations. Add a comment to explain why it is
disabled by default.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The cryptographic engine on the master cp110 is now enabled by default
at the SoC level. Remove its dts nodes that were only enabling it.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable the cryptographic engine at the SoC level on the master cp110.
This engine is always present and do not depends on any pinmux
configuration.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
By adding this regulator, the SD cards are usable at higher speed
protocols such as SDR104.
This patch was tested with an SD HC card compatible with UHS-I.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 37xx SoCs has 2 SDHCI interfaces. This patch adds the second
one.
Moreover, the Armada 37xx DB v2 board populates the 2 SDHCI interfaces.
The second interface is using pluggable module that can either
have an SD connector or eMMC on it.
This patch adds support for SD module in the device DT.
[ gregory.clement@free-electrons.com:
- Add more detail in commit log
- Sort the dt node in address order
- Document the SD slot in the dts ]
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
When several groups of register address and size are used with reg, then
surround each one by angle bracket.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The initial device tree file was for the board V1.4. Now the V2.0 board
is also available. The same dtb will work for both, but the CON number
have changed, so update the comment in the dts to reflect this.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Explicitly enable the MDIO nodes in the Marvell Armada 7k DB and Marvell
Armada 8k DB. This is needed as the MDIO nodes will be disabled in the
CP 110 slave and master dtsi by a following up patch.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The EIP197 cryptographic engine supports 64 bits address width but is
limited to 40 bits on 7k/8k. Add a dma-mask property in the
cryptographic engine nodes to reflect this.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable the 1GB Ethernet interface that lives on the slave CP110,
with its corresponding phy (that oddly lives on the master CP110).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add the three required clocks for the MDIO interface to be functional
on Armada 8k platforms. Without this, the CPU hangs, causing RCU
stalls or the system to become unresponsive.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
[Thomas:
- remove mg_core_clock, since it's a parent of mg_clock
- also add clock references to the slave CP mdio instance]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Armada 8040 DB is equipped with 4 (2x 10G SFI + 2x 1G RGMII)
ethernet ports of which only one was hitherto enabled.
Because currently mvpp2 driver is capable of supporting only
1G RGMII/SGMII, enable second port from CP slave HW block.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add sdhci support for MACCHIATOBin boards. This uses the AP806 SDHCI
for eMMC and CP110 master for the SD card slot.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The XORv2 engines in the AP side of the Armada 7K/8K SoCs are using the
AP MS core clock as input, so this commit adds the appropriate clocks
properties.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
