Newer revs of da830 silicon have different 'variant' field of the JTAG
id register. Current code only supports rev 1.0 silicon.
This patch adds support for rev1.1 and rev2.0 silicon and updates
the 'name' strings to add a '-' between 'omap' & 'l137' to have
consistent naming with da850/omap-l138.
From Mark Grosen <mgrosen@ti.com>:
"There are currently three silicon revisions for OMAPL137. The JTAG IDs
(DEVIDR register contents) for each silicon revision are shown below:
0x0B7D F02F for silicon revision 1.0
0x8B7D F02F for silicon revision 1.1
0x9B7D F02F for silicon revision 2.0
Corresponding errata documentation will be available in the next few
weeks on the ti.com website."
Reported-by: Nick Thompson <Nick.Thompson@gefanuc.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The machine name string shows up in /proc/cpuinfo under 'Hardware' and
can be used by userspace apps. Make the format consistent with the
DA850/OMAP-l138 EVM by adding the '-' between OMAP and L137.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
On this board the OHCI port's power control and over-current signals from
TPS2065 power switch are connected via GPIO1[15] and GPIO2[1] respectively,
so we can implement the DA8xx OHCI glue layer's hooks for overriding the
root hub port's power and over-current status bits.
We also have to properly set up the clocking mode in the CFGCHIP2 register,
so that internal 24 MHz reference clock is fed to the USB 2.0 (MUSB) PHY and
its output is used to clock the USB 1.1 (OHCI) PHY...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Add the function to register the OHCI platform device, given the root hub
related platform data passed from the board specific code. The platfrom
data provide for overriding the OHCI port power and over-current bits at
the board level.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The patch itself does not change the functionality of
any existing code. PARAM entries in the present GIT kernel
are referred to as slots. New API's being added to the
EDMA driver were referring to these PARAM entries as
"params". This patch updates the terminolgy used in the
EDMA driver.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The reserve_contiguous_params function is used to reserve
a set of contiguous PARAMs. If we do not find a complete
set of contiguous PARAMs, the functions still has to free
every PARAM that it found to be free in the process of finding a
complete set and thus marked as "in use".
This patch mainly deals with correctly handling the
freeing of PARAMs.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch updates the NAND driver platform data to use 4-bit ECC and the
ECC_HW/ECC_HW_OOB_FIRST modes.
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch updates the NAND driver platform data to use 4-bit ECC and the
ECC_HW/ECC_HW_OOB_FIRST modes.
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The edma_alloc_cont_slots API is used for obtaining a set of
contiguous slots. When we use the "_ANY" option with this
API, by definition of this option it is suppossed to start
looking for a set of contiguous slots starting from slot 64 for
DaVinci SOC's and 32 for DA8xx SOC's. This has been explained in
the API description in the driver itself. So when we use the
"_ANY" option with this API, the slot number passed as
an argument should be a "don't care".
This patch takes care of this condition mentioned above.
When checking to see if the starting slot is a valid number,
it checks to make sure that the "_ANY" option is not used.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
In the edma_free_cont_slots API, the variable slot was being modified
and then used in the for loop.
This results in incorrect behaviour when the API is used.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
On the latest DA850/OMAP-L138 EVM (Beta) the GPIO pin
number of LCD panel power has changed. This patch takes
care of this change. Software will support only Beta
versions of DA850/OMAP-L138 EVM.
In the process, add the missing entry for data pin 0
and remove the GPIO specific pins from da850_lcdcntl_pins
structure. EVM specific muxing for LCD is being done in the
board file now.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Add RTC support for the da830/omap-l137 and da850/omap-l138
SoC's by leveraging existing the rtc-omap driver.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Add graphics support for the Sharp LCD035Q3DG01 graphical
LCD that's on the User Interface (UI) daughter card of the
DA830/OMAP-L137 EVM.
The LCD shares EMIFA lines with the NAND and NOR devices that
are also on the UI card so those lines are shared via a couple
of muxes. The muxes are controlled by the 'MUX_MODE' line on
the UI card. The 'MUX_MODE' line is controlled by pin P6 of
a pcf8574 i2c expander that's at i2c address 0x3f on UI card.
The i2c expander is controlled using the gpio infrastructure
from the board code using the 'setup()' and 'teardown()'
routines.
Signed-off-by: Steve Chen <schen@mvista.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Add support for the Sharp LCD035Q3DG01 graphical LCD. This
requires a minor interface change to da8xx_register_lcdc()
so that the board code can pass in the platform_data which
describes the lcd controller that's to be used.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
DM6467 silicon revisions 3.x have variant field in JTAGID register as '1'.
This path adds entry for the same in dm646x_ids to be able to boot on boards
with 3.x revision chips.
Also modifies name for 'variant=0' (revisions 1.0, 1.1).
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The patch allows Async3 clock source to be selected between PLL1 SYSCLK2
and PLL0 SYSCLK2.
Having Async3 source from PLL1 SYSCLK2 allows peripherals on that
domain to remain unaffected by frequency scaling on PLL0.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The clk_set_parent() API is implemented to enable re-parenting
clocks in the clock tree.
This is useful in DVFS and helps by shifting clocks to an asynchronous
domain where supported by hardware
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
clk_round_rate, clk_set_rate have been updated to handle dynamic
frequency changes.
The motivation behind the changes is to support dynamic CPU frequency
change.
davinci_set_pllrate() changes the PLL rate of a given PLL. This function
has been presented as a generic function though it has been tested only
on OMAP-L138 EVM. No other currently available DaVinci device will probably
use this function, but any future device specific changes will hopefully be
small enough to get taken care using a cpu_is_xxx() macro.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Make clock rate recalculation easy by having a re-calculate
function for each clock.
The existing functions for calculation of output rates of PLL
and PLL-derived sysclks have been convered to the new
re-calculate API.
A new function is introduced to take care of rate
(re)calculation for leaf clocks.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Achieve easy top down traversal of clock tree by keeping
track of each clock's list of children.
This is useful in supporting DVFS where clock rates of
all children need to be updated in an efficient manner.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This makes it clear that JTAG ID register is part of the
SYSCFG module
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Avoid use of IO_ADDRESS() for SYSCFG module by doing an ioremap() instead.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Rename the DA8XX_BOOT_CFG_BASE macro to get it in line
with the public documentation for these parts.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The DA830/OMAP-L137 EVM cannot use the default pinmux setup for McASP1
so put the correct settings in the board file for that platform.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
For consistency with existing code, change the name of
da8xx_init_mcasp() to da8xx_register_mcasp().
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Some mcasp code was inserted between the emac resource setup
and the related register routine that registers the emac.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
1) Registers the platform device for McBSP on dm365.
2) Add platform data to DM365 EVM board file.
3) Set i2c address for audio codec at DM365 EVM board file.
Signed-off-by: Miguel Aguilar <miguel.aguilar@ridgerun.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
The parent clock for the USB source clock is actually PLL1 aux clock,
not PLL2 sysclk1.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This patch fixes a typo/bug in the DM365 SDIO interrupt assignment
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
iommu=soft boot option forces the kernel to use swiotlb.
( This has the side-effect of enabling the swiotlb over the
GART if this boot option is provided. This is the desired
behavior of the swiotlb boot option and works like that
for all other hw-IOMMU drivers. )
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: yinghai@kernel.org
LKML-Reference: <20091125084611O.fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Commit d5ce528c8e (Blackfin: convert irq/process to asm-generic)
incorrectly merged the smp and non-smp cases of start_thread() causing the
L1 stack to be setup on the SMP port instead of the UP port.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
To set zeroes the sizeof the struct should be used rather
than sizeof the pointer, kzalloc does that.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Commit c014e15a2f (Blackfin: convert ptrace to new memory functions)
introduced a copy & paste typo in the ptrace poke data/text handling. The
access_process_vm() function call was telling it to read instead of write.
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Parts that have on-chip L2 SRAM cannot safely utilize writeback caching
mode, so reject any attempts to use it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Ironically, the atomic testset instruction cannot be interrupted else it
will produce incorrect results. So disable interrupts to help it out.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add some recently documented anomalies (473, 474, 475, 477). Also stick
a "do not edit" notice in here so people know these are copies of some
master version.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Kconfig option is "BFIN_EXTMEM_WRITETHROUGH", not "..._WRITETROUGH".
Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some Blackfin on-chip ROMs utilize some MDMA channels during the suspend
and resume process, but don't clean up after themselves. So manually
clear all DMA channels when resuming since no DMA could have been running
at this point in time. Now Linux should be able to work regardless of any
laziness on the part of the on-chip ROM or boot loader.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch factors out the search for an MMCONFIG region, which was
previously implemented in both mmconfig_32 and mmconfig_64. No functional
change.
Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This is only used internally now, but eventually will be used in the
hot-remove path to remove the MMCONFIG region associated with a host bridge.
Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This changes pci_mmcfg_region from a table to a list, to make it easier
to add and remove MMCONFIG regions for PCI host bridge hotplug.
Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This replaces "typeof(pci_mmcfg_config[0])" with the actual type because
I plan to convert pci_mmcfg_config to a list, and then "pci_mmcfg_config[0]"
won't mean anything.
Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
The virtual address is only used for x86_64, but it's so much simpler
to manage it as part of the pci_mmcfg_region that I think it's worth
wasting a pointer per MMCONFIG region on x86_32.
Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Since pci_mmcfg_region contains the struct resource, no need to pass the
pci_mmcfg_region *and* the resource start/size.
Reviewed-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
