Felix Kuehling
97672cbe3d
drm/amdkfd: Add dGPU support to the device queue manager
...
GFXv7 and v8 dGPUs use a different addressing mode for KFD compared
to APUs (GPUVM64 vs HSA64). And dGPUs don't support MTYPE_CC. They
use MTYPE_UC instead for memory that requires coherency.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Oded Gabbay <oded.gabbay@gmail.com >
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com >
2018-01-04 17:17:44 -05:00
Felix Kuehling
d146c5a719
drm/amdkfd: Make sched_policy a per-device setting
...
Some dGPUs don't support HWS. Allow them to use a per-device
sched_policy that may be different from the global default.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com >
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com >
2018-01-04 17:17:43 -05:00
Felix Kuehling
3ee2d00cfb
drm/amdkfd: Conditionally enable PCIe atomics
...
This will be needed for most dGPUs.
CC: linux-pci@vger.kernel.org
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com >
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com >
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com >
2018-01-04 17:17:41 -05:00
Gustavo A. R. Silva
3f866f5f04
drm/amdkfd: Use ARRAY_SIZE macro in kfd_build_sysfs_node_entry
...
Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element.
This issue was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com >
Reviewed-by: Felix Kuehling<Felix.Kuehling@amd.com >
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com >
2018-01-18 18:39:55 -06:00
Shaoyun Liu
4fd09a19a6
drm/admgpu: Reduce the usage of soc15ip.h
...
Remove the header where it's not used.
Acked-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-08 11:35:19 -05:00
Shaoyun Liu
cd29253f65
drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset
...
Acked-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-08 11:32:24 -05:00
Shaoyun Liu
946a4d5b30
drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array
...
Handle dynamic offsets correctly in static arrays.
Acked-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-08 11:18:51 -05:00
Shaoyun Liu
b466107e8b
drm/amdgpu: Use dynamic IP offset for register access on SOC15
...
Update the register access macros and functions to take into
account the new dynamic IP base offsets.
Acked-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-08 11:17:56 -05:00
Shaoyun Liu
4522824c48
drm/amdgpu: Dynamic initialize IP base offset
...
The base offsets of the IP blocks may change across
asics even though the relative register offsets
are the same for an IP. Handle this dynamically.
Acked-by: Christian Konig <christian.koenig@amd.com >
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-08 11:16:51 -05:00
Lucas Stach
4983e48c85
drm/sched: move fence slab handling to module init/exit
...
This is the only part of the scheduler which must not be called from
different drivers. Move it to module init/exit so it is done a single
time when loading the scheduler.
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-07 11:52:14 -05:00
Lucas Stach
1b1f42d8fd
drm: move amd_gpu_scheduler into common location
...
This moves and renames the AMDGPU scheduler to a common location in DRM
in order to facilitate re-use by other drivers. This is mostly a straight
forward rename with no code changes.
One notable exception is the function to_drm_sched_fence(), which is no
longer a inline header function to avoid the need to export the
drm_sched_fence_ops_scheduled and drm_sched_fence_ops_finished structures.
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Lucas Stach <l.stach@pengutronix.de >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-07 11:51:56 -05:00
Alex Deucher
9ce6aae12c
drm/amdgpu: add license to files where it was missing
...
These files were missing it before.
Acked-by: Harry Wentland <harry.wentland@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-07 11:51:25 -05:00
Alex Deucher
1a09120f83
drm/amdgpu: add license to Makefiles
...
Was missing license text.
Acked-by: Harry Wentland <harry.wentland@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-07 11:51:10 -05:00
Andrey Grodzovsky
54f539086a
drm/amdgpu: Fix amdgpu_sync_add_later to preserve explicit flag.
...
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-07 11:48:56 -05:00
Noralf Trønnes
ab77e02ce9
drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()
...
This driver can use drm_fb_helper_lastclose() in its .lastclose function.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Remove the unused driver implementations.
Cc: Alex Deucher <alexander.deucher@amd.com >
Cc: "Christian König" <christian.koenig@amd.com >
Signed-off-by: Noralf Trønnes <noralf@tronnes.org >
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:33 -05:00
Noralf Trønnes
366c1baa87
drm/amd/display: Use drm_fb_helper_poll_changed()
...
This driver can use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Alex Deucher <alexander.deucher@amd.com >
Cc: "Christian König" <christian.koenig@amd.com >
Signed-off-by: Noralf Trønnes <noralf@tronnes.org >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:33 -05:00
Christian König
d4b7648d6d
drm/amdgpu: fix amdgpu_sync_resv v2
...
Fixes a bug introduced by AMDGPU_GEM_CREATE_EXPLICIT_SYNC. We still need
to wait for pipelined moves in the shared fences list.
v2: fix typo
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Andres Rodriguez <andresx7@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:32 -05:00
Roger He
5f97fc0e03
drm/amd/amdgpu: set gtt size according to system memory size only
...
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Roger He <Hongbo.He@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:31 -05:00
Andrey Grodzovsky
cebb52b7bc
drm/amdgpu: Get rid of dep_sync as a seperate object.
...
Instead mark fence as explicit in it's amdgpu_sync_entry.
v2:
Fix use after free bug and add new parameter description.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:31 -05:00
Christian König
97489129c2
drm/amdgpu: allow specifying vm_block_size for multi level PDs v2
...
This patch allows specifying the vm_block_size even when multi level
page directories are active.
v2: fix signed/unsigned compare warning
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:31 -05:00
Christian König
f3368128ba
drm/amdgpu: move validation of the VM size into the VM code
...
This moves validation of the VM size parameter into amdgpu_vm_adjust_size().
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:30 -05:00
Christian König
341b759e64
drm/amdgpu: allow non pot VM size values
...
The VM size actually doesn't need to be a power of two.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:30 -05:00
Christian König
36539dcea3
drm/amdgpu: choose number of VM levels based on VM size
...
This allows us limiting the VM size for testing even of Vega10.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:29 -05:00
Christian König
b38f41ebb8
drm/amdgpu: unify VM size handling of Vega10 with older generation
...
One function to rule them all.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:29 -05:00
Christian König
0410c5e514
drm/amdgpu: fix amdgpu_vm_num_entries
...
The block size only affects the leave nodes, everything else is fixed.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:29 -05:00
Christian König
507831473f
drm/amdgpu: fix VM PD addr shift
...
The block size only affects the leave nodes, everything else is fixed.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:28 -05:00
Frank Min
722570435b
drm/amdgpu: correct vce4.0 fw config for SRIOV (V2)
...
1. program vce 4.0 fw with 48 bit address
2. correct vce 4.0 fw stack and date offset
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Frank Min <Frank.Min@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:28 -05:00
Michel Dänzer
38636603d8
drm/amd/display: Don't call dm_log_to_buffer directly in dc_conn_log
...
dm_log_to_buffer logs unconditionally, so calling it directly resulted
in the main message being logged even when the event type isn't enabled
in the event mask.
To fix this, use the new dm_logger_append_va API.
Fixes spurious messages like
[drm] {1920x1200, 2080x1235@154000Khz}
in dmesg when a mode is set.
v2:
* Use new dm_logger_append_va API, fixes incorrect va_list usage in v1
* Just use and decrease entry.buf_offset to get rid of the trailing
newline
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:28 -05:00
Michel Dänzer
d6f068a53b
drm/amd/display: Add dm_logger_append_va API
...
Same as dm_logger_append, except it takes a va_list instead of a
variable number of arguments. dm_logger_append is now a minimal wrapper
around dm_logger_append_va.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:27 -05:00
Shirish S
1e88ad0ae3
drm/amd/display: remove usage of legacy_cursor_update
...
Currently the atomic check code uses legacy_cursor_update
to differnetiate if the cursor plane is being requested by
the user, which is not required as we shall be updating
plane only if modeset is requested/required.
Have tested cursor plane and underlay get updated seamlessly,
without any lag or frame drops.
Signed-off-by: Shirish S <shirish.s@amd.com >
Reviewed-by: Harry Wentland <harry.wentland@amd.com >
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:26 -05:00
Feifei Xu
b1ebd7c0cd
drm/amd/include:cleanup raven1 vcn header files.
...
Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:26 -05:00
Feifei Xu
6b5b5fea3b
drm/amd/include:cleanup raven1 thm header files.
...
Cleanup asic_reg/raven1/THM folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:26 -05:00
Feifei Xu
51199920a2
drm/amd/include:cleanup raven1 nbio header files.
...
Cleanup asic_reg/raven1/NBIO folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:25 -05:00
Feifei Xu
a146391bbb
drm/amd/include:cleanup raven1 mp header files.
...
Cleanup asic_reg/raven1/MP folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:25 -05:00
Feifei Xu
95c1f7aad2
drm/amd/include:cleanup raven1 mmhub header files.
...
Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:24 -05:00
Feifei Xu
5a18155d99
drm/amd/include:cleanup raven1 gc header files.
...
Cleanup asic_reg/raven1/GC folder. Remove unused files:
gc_9_1_default.h gc_9_1_sh_mask.h
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:24 -05:00
Feifei Xu
ad941f7a8b
drm/amd/include:cleanup raven1 dcn header files.
...
Cleanup asic_reg/raven1/DCN folder.Remove unused
dcn_1_0_default.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:23 -05:00
Feifei Xu
02cf8837d0
drm/amd/include:cleanup raven1 sdma header files.
...
Cleanup asic_reg/raven1/SDMA0 folder.Remove unused sdma0_4_1_sh_mask.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:23 -05:00
Feifei Xu
fb960bd283
drm/amd/include:cleanup vega10 header files.
...
Remove asic_reg/vega10 folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:22 -05:00
Feifei Xu
8af7454e7c
drm/amd/include:cleanup vega10 osssys header files.
...
Cleanup asic_reg/vega10/OSSSYS folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:22 -05:00
Feifei Xu
424d9bb4d5
drm/amd/include:cleanup vega10 smuio header files.
...
Cleanup asic_reg/vega10/SMUIO folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:21 -05:00
Feifei Xu
daad67b51e
drm/amd/include:cleanup vega10 nbif header files.
...
Cleanup asic_reg/vega10/NBIF folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:21 -05:00
Feifei Xu
f0a58aa3f2
drm/amd/include:cleanup vega10 nbio header files.
...
Cleanup asic_reg/vega10/NBIO folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:21 -05:00
Feifei Xu
65417d9f55
drm/amd/include:cleanup vega10 mmhub header files.
...
Cleanup asic_reg/vega10/MMHUB folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:20 -05:00
Feifei Xu
cde5c34f63
drm/amd/include:cleanup vega10 gc header files.
...
Cleanup asic_reg/vega10/GC folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:20 -05:00
Feifei Xu
18297a215b
drm/amd/include:cleanup vega10 vce header files.
...
Cleanup asic_reg/vega10/VCE folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:19 -05:00
Feifei Xu
5d735f83c2
drm/amd/include:cleanup vega10 uvd header files.
...
Cleanup asic_reg/vega10/UVD folder,remove unused uvd_7_0_default.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:19 -05:00
Feifei Xu
135d4b10d3
drm/amd/include:cleanup vega10 dce header files.
...
Cleanup asic_reg/vega10/DC folder.Remove dce_12_0_default.h.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:18 -05:00
Feifei Xu
90c7a9358f
drm/amd/include: cleanup vega10 umc header files.
...
Remove asic/vega10/UMC folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:18 -05:00
Feifei Xu
a629bf32df
drm/amd/include:cleanup vega10 thm header files.
...
Cleanup asic_reg/vega10/THM folder.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-12-06 12:48:18 -05:00