Commit Graph

9420 Commits

Author SHA1 Message Date
Felix Kuehling
6b95e7973a drm/amdkfd: Add quiesce_mm and resume_mm to kgd2kfd_calls
These interfaces allow KGD to stop and resume all GPU user mode queue
access to a process address space. This is needed for handling MMU
notifiers of userptrs mapped for GPU access in KFD VMs.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:32:32 -04:00
Felix Kuehling
d1853f42b6 drm/amdkfd: GFP_NOIO while holding locks taken in MMU notifier
When an MMU notifier runs in memory reclaim context, it can deadlock
trying to take locks that are already held in the thread causing the
memory reclaim. The solution is to avoid memory reclaim while holding
locks that are taken in MMU notifiers by using GFP_NOIO.

This commit fixes memory allocations done while holding the dqm->lock
which is needed in the MMU notifier (dqm->ops.evict_process_queues).

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:32:31 -04:00
Felix Kuehling
6e08e0995b drm/amdgpu: Avoid reclaim while holding locks taken in MMU notifier
When an MMU notifier runs in memory reclaim context, it can deadlock
trying to take locks that are already held in the thread causing the
memory reclaim. The solution is to avoid memory reclaim while holding
locks that are taken in MMU notifiers.

This commit fixes kmalloc while holding rmn->lock by moving the call
outside the lock. The GFX MMU notifier also locks reservation objects.
I have no good solution for avoiding reclaim while holding reservation
objects. The HSA MMU notifier will not lock any reservation objects.

v2: Moved allocation outside lock instead of using GFP_NOIO

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:32:30 -04:00
Felix Kuehling
0919195f2b drm/amdgpu: Enable amdgpu_ttm_tt_get_user_pages in worker threads
This commit allows amdgpu_ttm_tt_get_user_pages to work in a worker
thread rather than regular process context. This will be used when
KFD userptr BOs are restored after an MMU-notifier eviction.

v2: Manage task reference with get_task_struct/put_task_struct

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Oded Gabbay <oded.gabbay@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:32:29 -04:00
Felix Kuehling
e52482dec8 drm/amdgpu: Add MMU notifier type for KFD userptr
This commit adds the notion of MMU notifier types GFX and HSA. GFX
continues to work like MMU notifiers did before. HSA adds support for
KFD userptr BOs. The implementation of KFD userptr eviction is a stub
for now.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:32:28 -04:00
Felix Kuehling
1679ae8f8f drm/amdkfd: Use ordered workqueue to restore processes
Restoring multiple processes concurrently can lead to live-locks
where each process prevents the other from validating all its BOs.

v2: fix duplicate check of same variable

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:30:36 -04:00
Felix Kuehling
810955ba71 drm/amdgpu: Fix acquiring VM on large-BAR systems
On large-BAR systems the VM page tables for compute are accessed by
the CPU. Always allow CPU access to the page directory so that it can
be used later by the CPU when a VM is converted to a compute VM.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:30:35 -04:00
Felix Kuehling
72a01d231d drm/amdkfd: Deallocate SDMA queues correctly
Deallocate SDMA queues during abnormal process termination and when
queue creation fails after the SDMA allocation.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:30:34 -04:00
Felix Kuehling
c70a362687 drm/amdkfd: Fix scratch memory with HWS enabled
Program sh_hidden_private_base_vmid correctly in the map-process
PM4 packet.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2018-03-23 15:30:33 -04:00
Rex Zhu
09695ad78f drm/amd/pp: clean header file hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-23 09:42:42 -05:00
Colin Ian King
5b2933556f drm/amd/pp: use mlck_table.count for array loop index limit
v2: use temporaries to trivially reduces object size.

The for-loops process data in the mclk_table but use slck_table.count
as the loop index limit.  I believe these are cut-n-paste errors from
the previous almost identical loops as indicated by static analysis.
Fix these.

Detected by CoverityScan, CID#1466001 ("Copy-paste error")

Fixes: 5d97cf39ff ("drm/amd/pp: Add and initialize OD_dpm_table for CI/VI.")
Fixes: 5e4d4fbea5 ("drm/amd/pp: Implement edit_dpm_table on smu7")

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-23 09:42:00 -05:00
Alex Deucher
13b40935cf drm/amdgpu: Add an ATPX quirk for hybrid laptop
_PR3 doesn't seem to work properly, use ATPX instead.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=104064
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-03-22 20:38:05 -05:00
Colin Ian King
36b3f84a05 drm/amdgpu: fix spelling mistake: "asssert" -> "assert"
Trivial fix to spelling mistake in pr_err error message text

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-22 14:43:43 -05:00
Rex Zhu
8ebde09b16 drm/amd/pp: Add new asic support in pp_psm.c
In new asics(vega12), no power state management in driver,
So no need to implement related callback functions.
and add some ps checks in pp_psm.c

Revert "drm/amd/powerplay: add new pp_psm infrastructure for vega12 (v2)"
This reverts commit 7d1a63f3aa331b853e41f92d0e7890ed31de8c13.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-22 14:43:29 -05:00
Rex Zhu
bbfcc8af37 drm/amd/pp: Clean up powerplay code on Vega12
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-22 14:43:20 -05:00
Rex Zhu
031ec948a8 drm/amd/pp: Add smu irq handlers for legacy asics
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-22 14:43:10 -05:00
Rex Zhu
3c79684396 drm/amd/pp: Fix set wrong temperature range on smu7
Fix the issue thermal irq was always triggered
as GPU under temperature range detected

The low temp in default thermal policy
was set to -273. so need to use int type for the low temp.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-22 14:43:01 -05:00
Chunming Zhou
cc15dfaa85 drm/amdgpu: Don't change preferred domian when fallback GTT v5
v2: add sanity checking
v3: make code open
v4: also handle visible to invisible fallback
v5: Since two fallback cases, re-use goto retry

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-22 14:42:33 -05:00
Andrey Grodzovsky
b6356df3eb drm/amdgpu: Fix NULL ptr on driver unload due to init failure.
Problem:
When unloading due to failure amdgpu_device_fini was called twice
which was leading to NULL ptr in amdgpu_irq_disable_all.

Fix:
Call amdgpu_device_fini only once from amdgpu_driver_unload_kms.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 15:04:42 -05:00
Christian König
2333bf9ad9 drm/amdgpu: fix "mitigate workaround for i915"
Mixed up exporter and importer here. E.g. while mapping the BO we need
to check the importer not the exporter.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105633
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 15:04:03 -05:00
Rex Zhu
3296c4ae97 drm/amd/pp: Add smu irq handlers in sw_init instand of hw_init
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:59 -05:00
Rex Zhu
4d2003721c drm/amd/pp: Refine register_thermal_interrupt function
v2: add Vega12 support

1. delete useless argument in function register_thermal_interrupt
2. rename function name register_thermal_interrupt to register_irq_handlers

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:58 -05:00
Rex Zhu
160b8e7593 drm/amdgpu: Remove wrapper layer of cgs irq handling
v2: add Vega12 support

1. remove struct cgs_os_ops
2. delete cgs_linux.h
3. refine the irq code for vega10, can fix set pp table
   failed issue.
4. add common smu irq process function

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:58 -05:00
Kenneth Feng
7436854ebd drm/amd/powerplay: Return per DPM level clock
Add change to return per DPM level clock in DAL interface

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:58 -05:00
Kenneth Feng
7f3f106e44 drm/amd/powerplay: Remove the SOC floor voltage setting
Remove W/A carried over from VG10 to set VDDSOC Floor Voltage
prior to enabling DPM since the VBIOS covers the floor voltage
setting now

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:57 -05:00
Evan Quan
f0c2b16ba8 drm/amdgpu: no job timeout setting on compute queues
Under some heavy computing environment(e.g. dgemm test), it
takes the asic over 10+ seconds to finish the dispatched job
which will trigger the timeout.

It's quite confusing although it does not seem to bring any
real problems. As a quick workround, we choose to not enfoce
the timeout setting on compute queues.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:57 -05:00
Alex Deucher
dc53d543fc drm/amdgpu: add vega12 pci ids (v2)
v2: add additional pci ids

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:57 -05:00
Evan Quan
2cac05dee6 drm/amd/powerplay: add the hw manager for vega12 (v4)
handles the driver power state setup

v2: squash in the following:
- handle negative temperature ranges
- add vega12 thermal ranges
- use ffs/fls
- remove ACG code
- resend NumOfDisplays message
- correct max dpm levels
- remove power containment settings
- fix warnings
- add sensors interface
- delete unused overdrive arbiter
- drop get_temperature callback
- smu table cleanup
- atomfirmware smu dpm table updates
v3: rebase
v4: rebase

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:56 -05:00
Evan Quan
fa969db4ad drm/amd/powerplay: add the smu manager for vega12 (v4)
handles the driver interaction with the smu firmware

v2: squash in:
- s3 fix for firmware loading
- smu loading through the psp
- unecessary calls to is_smc_ram_running()
- smu table cleanups
v3: rebase
v4: rebase, smu bo allocation fixes, add dpm running callback

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:56 -05:00
Evan Quan
d33edb6428 drm/amd/powerplay: add new pp_psm infrastructure for vega12 (v2)
New psm infrastructure for vega12.

v2: rebase (Alex)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:55 -05:00
Evan Quan
3503d588e7 drm/amd/powerplay: update ppatomfwctl (v2)
Add new get_smc_dpm_information api to fetch the smu dpm
info from the vbios.

v2: deal with updated table format.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:55 -05:00
Evan Quan
c042c9b434 drm/amd/powerplay: add vega12_pptable.h
Defines the power table format in the vbios.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:55 -05:00
Evan Quan
c4a4f4b6cb drm/amd/powerplay: add vega12_ppsmc.h
Defines the smc message interface with the driver.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:54 -05:00
Evan Quan
97ea8ebe49 drm/amd/powerplay: add new smu9_driver_if.h for vega12 (v2)
Add driver firmware interface header.

v2: squash in interface updates.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:54 -05:00
Evan Quan
f3f8864db5 drm/amd/powerplay: update atomfirmware.h (v2)
Add new smu_info table.

v2: update table format.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:53 -05:00
Evan Quan
80be32b58e drm/amd/powerplay: add vega12_inc.h
Used for the powerplay implementation.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:53 -05:00
Hawking Zhang
3084eb0011 drm/amdgpu/soc15: initialize reg base for vega12
Initialize the IP offsets for vega12.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:53 -05:00
Feifei Xu
f559fe2bc1 drm/amd/soc15: Add external_rev_id for vega12.
Add external_rev_id for vega12.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:52 -05:00
Evan Quan
e4a387558e drm/amdgpu/soc15: update vega12 cg_flags
Add the appropriate clockgating flags for vega12

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:52 -05:00
Alex Deucher
692069a1a4 drm/amdgpu/soc15: add support for vega12
Add the IP blocks, clock and powergating flags, and
common clockgating support.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:51 -05:00
Hawking Zhang
62b35f9ad1 drm/amdgpu/gfx9: add golden setting for vega12 (v3)
Add gfx9_2_1 golden setting.

v2: switch to soc15_program_register_sequence for
golden setting programming
v3: squash in additional golden updates

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Ken Wang <ken.wang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:51 -05:00
Alex Deucher
23862464f8 drm/amdgpu/gfx9: add clockgating support for vega12
Same as vega10 and raven.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:51 -05:00
Alex Deucher
8b39947755 drm/amdgpu/gfx9: add support for vega12
Same as vega10 and raven.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:50 -05:00
Alex Deucher
e5c62eddd1 drm/amdgpu/gfx9: add gfx config for vega12
Just a place holder for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:50 -05:00
Alex Deucher
d5e8ef0648 drm/amdgpu/gfx9: Add placeholder for vega12 golden settings
Fill these in when we get them.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:49 -05:00
Alex Deucher
739ffd9b47 drm/amdgpu/gfx9: add support for vega12 firmware
Declare and fetch the appriopriate files.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:49 -05:00
Feifei Xu
f06a32e4d2 drm/amdgpu/sdma4: Update vega12 sdma golden setting.
Update vega12 sdma golden setting.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Ken Wang <ken.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:49 -05:00
Hawking Zhang
9acdc00c24 drm/amdgpu/sdma4: add sdma4_0_1 support for vega12 (v3)
Add sdma golden setting for vega12.

v2: switch to soc15_program_register_sequence for
golden register programming
v3: squash in unused declaration fix

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:48 -05:00
Alex Deucher
900bad3fe9 drm/amdgpu/sdma4: add clockgating support for vega12
Same as vega10 for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:48 -05:00
Alex Deucher
607c26a0ea drm/amdgpu/sdma4: Add placeholder for vega12 golden settings
Fill these in when we get them.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:47 -05:00