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358 Commits

Author SHA1 Message Date
Dmytro Laktyushkin
05a19c39cb drm/amd/display: fix surface attachment handling of pipe split 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:42 -04:00
Dmytro Laktyushkin
5d11e9fca5 drm/amd/display: allow taking split pipes during resource mapping 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:42 -04:00
Dmytro Laktyushkin
259873e1ff drm/amd/display: stop adjusting scl taps when scl ratio is one on dcn 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:41 -04:00
Jeff Smith
630e357385 drm/amd/display: default spd packet to invalid 
Signed-off-by: Jeff Smith <whydoubt@gmail.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:39 -04:00
Shirish S
0a1c73ec8e drm/amd/display: re-order the luma chroma addres updation 
The DCE engine triggers scan as soon as the luma
address is updated, since it is updated before chroma address
the chroma data is not scanned out properly or in order.
This patch fixes this by re-ordering the same.

BUG: SWDEV-119421
TEST: (On Chromium OS for Stoney Only)
    * Executed below tests to see YUV(underlay) & RGB planes on eDP
      plane_test --format XR24 --size 500x100 -p --format NV12 --size 500x500
    * Chroma data is scanned properly.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:39 -04:00
Hersen Wu
e4bf0a0eed drm/amd/display: create_links bug with empty DDI slot 
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:38 -04:00
Harry Wentland
7fa4fcba7a drm/amd/display: Don't guard x86 in Makefile 
make-kpkg doesn't seem to like it

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:37 -04:00
Amy Zhang
ece22899a4 drm/amd/display: Disable PSR entry abort to prevent intermittent freezes 
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:36 -04:00
Zeyu Fan
72dfad5017 drm/amd/display: Add FORCE_HDR timing flag 
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:35 -04:00
Corbin McElhanney
c7dbdf1535 drm/amd/display: Allow update stream without surface 
Passing NULL as surfaceUpdates to dc_update_surfaces_and_stream now
updates just the stream. Code that is dependent on srf_updates was moved
below the NULL check.

Signed-off-by: Corbin McElhanney <corbin.mcelhanney@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:34 -04:00
Charlene Liu
29eba8e88f drm/amd/display: Add disable_psr debug flag 
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:34 -04:00
Andrey Grodzovsky
893a2dd4a3 drm/amd/display: Clean unused interface. 
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:33 -04:00
Harry Wentland
bf2e2e2e0e drm/amd/display: Limit DCN to x86 arch 
DCN bw calcs currently rely on the following gcc options:
  -mhard-float -msse -mpreferred-stack-boundary=4

We probably shouldn't really try building this on architectures
other than x86.

CC: Alex Deucher <Alexander.Deucher@amd.com>
CC: Christian König <christian.koenig@amd.com>
CC: Michel Dänzer <michel.daenzer@amd.com>
CC: Tony Cheng <Tony.Cheng@amd.com>
CC: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:32 -04:00
Andrey Grodzovsky
c1473558e6 drm/amd/display: program scaler not called. 
Scaler code in case of UPDATE_TYPE_MED was not called
since new pipe context and current context are the same.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:31 -04:00
Dmytro Laktyushkin
e73b59b7e0 drm/amd/display: add always_scale debug flag to dc 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:31 -04:00
Rex Zhu
21de3396b4 drm/amd/display: call amdgpu_dm_fini when hw_fini. 
to free up drm mode_config info.

fix issue: unload amdgpu, can't load amdgpu again.
[drm:drm_debugfs_init [drm]] *ERROR* Cannot create /sys/kernel/debug/dri/0
[drm:drm_minor_register [drm]] *ERROR* DRM: Failed to initialize /sys/kernel/debug/dri.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andrey Grodzovsky<andrey.grodzovsky@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:29 -04:00
Harry Wentland
5aa35c1a16 drm/amd/display: Remove unused addr var in TG 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:28 -04:00
Dmytro Laktyushkin
d9e8887860 drm/amd/display: fix flip register write sequence 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:27 -04:00
Dmytro Laktyushkin
a7562ab35e drm/amd/display: remove GRPH_SURFACE_UPDATE_IMMEDIATE_EN field programming 
This is causing asserts for dce 8 and 10 since they do not contain this
field. It is also unnecessary for later DCEs as it is left in it's
default state of 0

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:26 -04:00
Tony Cheng
89c872e595 drm/amd/display: fix YUV surface address programming sequence 
need to program DCSURF_PRIMARY_SURFACE_ADDRESS last as HW automatically
latch rest of addr regs on write when SURFACE_UPDATE_LOCK is not used

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:26 -04:00
Tom St Denis
0b3454b7c4 drm/amd/display: Tidy up mem_input_program_surface_flip_and_addr() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:24 -04:00
Tom St Denis
76fd8eb8e2 drm/amd/display: Tidy up dce120_clock_source_create() 
Also change sizeof to be automatic based on type declaration.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:23 -04:00
Tom St Denis
cedaf3073a drm/amd/display: Clean up indentation in dce120_tg_set_blank() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:23 -04:00
Tom St Denis
7b7d68659e drm/amd/display: Make dce120_tg_is_blanked() more legible 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:22 -04:00
Tom St Denis
78178dea7a drm/amd/display: Fix indentation in dce120_tg_program_timing() 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:22 -04:00
Tom St Denis
a4b0a5b848 drm/amd/display: Tidy up dce120_timing_generator_enable_advanced_request() 
Simplify the function by removing identical looking code blocks.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:21 -04:00
Ayyappa Chandolu
0a5c357a85 drm/amd/display: Fix ASSR enablement on DP to EDP converter 
ASSR mode is not enable when we connect eDP panel via DP to eDP converter.
connector_signal is coming as SIGNAL_TYPE_DISPLAY_PORT. Present code
ignoring panel_mode_edp for SIGNAL_TYPE_DISPLAY_PORT. Added checking
panel_mode_edp for all signals.

Signed-off-by: Ayyappa Chandolu <Ayyappa.Chandolu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:20 -04:00
Leo (Sunpeng) Li
5aff86c1b3 drm/amd/display: Implement input gamma LUT 
1. Implemented dcn10_ipp_program_input_lut(), following the existing
   interface.
2. Added missing registers as needed
3. Change to REG_GET for *ram_select() funcs.
4. Removed gamma table init from DiagsDM::make_surface() for resolving
   CRC errors. Reason: Legacy LUT will be deprecated soon for Raven in
   favor of degamma/regamma.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:19 -04:00
Leo (Sunpeng) Li
98489c026e drm/amd/display: Refactor use_lut() from dce110 to dce 
use_lut() checks if the input surface's pixel format is compatible with
a 256 entry LUT. This function can be used across different versions and
not just dce11.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:19 -04:00
Dmytro Laktyushkin
afc8935ef0 drm/amd/display: revert dc_get_validate_context re-entrancy fix 
Apply dc_get_validate_context re-entrancy fix to dc_validate_resources instead

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:18 -04:00
Dmytro Laktyushkin
430ef426bc drm/amd/display: make dc_get_validate_context re-entrant 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:17 -04:00
Roman Li
ccaf31ec71 drm/amd/display: Fix 5th display lightup on Vega10 
- fixing bug in calculation of reg offset for D5VGA_CONTROL

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:17 -04:00
Tony Cheng
1f7f3aec12 drm/amd/display: read VM settings from MMHUB 
instead of GC, as after GFX off, GC can be power gated any time

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:16 -04:00
Dmytro Laktyushkin
1185da0869 drm/amd/display: add missing GRPH_UPDATE_LOCK field macro for dce_mem_input 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:15 -04:00
Leo (Sunpeng) Li
d3ec056208 drm/amd/display: Fix dcn10 cursor set position hang 
Calling dcn10_cursor_set_position() before dcn10_cursor_set_attributes()
with invalid (0-value) attributes can cause the ASIC to hang. This fix
checks that address.quadpart is non-zero within set_position before calling
set_attributes.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:14 -04:00
Andrey Grodzovsky
b802acc7f3 drm/amd/display: Clean unused interface. 
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:14 -04:00
Dmytro Laktyushkin
c34892144d drm/amd/display: dce 8 - 12 mem_input refactor to new style 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:12 -04:00
Amy Zhang
aa7397dfd4 drm/amd/display: Disable ABM when eDP is disabled 
- Add immediate ABM disable when eDP is disabled
- Fix purple screen when ABM is mistakenly enabled
on non eDP display

Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:12 -04:00
Dmytro Laktyushkin
4b28b76bfe drm/amd/display: fix mpo blanking out on one of planes being set not visible 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:11 -04:00
Amy Zhang
747be97f4e drm/amd/display: Program CSC Mode For BT2020 
- Add BT2020 color space in the set output csc default

Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:10 -04:00
Harry Wentland
ce923dc323 drm/amd/display: Remove duplicate entry from log_mask 
As pointed out by kbuild test robot and Julia Lawall.

CC: Julia Lawall <julia.lawall@lip6.fr>
CC: Alex Deucher <alexander.deucher@amd.com>

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:09 -04:00
Dmytro Laktyushkin
81e2b2de3d drm/amd/display: add explanation for surface_update_type 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:09 -04:00
Dmytro Laktyushkin
b71a061801 drm/amd/display: fix scaling info based surface update type check 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:08 -04:00
Dmytro Laktyushkin
0e12c3f6a0 drm/amd/display: add yuv pixel formats to pixel_format_to_bpp() 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:08 -04:00
Dmytro Laktyushkin
86006a7f54 drm/amd/display: fix scaling calculation for proper surface input format 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:07 -04:00
Harry Wentland
6a4c32dac5 drm/amd/display: DCE12 num_timing_generators should be 6 
We should also use it to determine pipe count.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:06 -04:00
Amy Zhang
f46661dd42 drm/amd/display: Move output transfer function to stream updates 
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:06 -04:00
Dmytro Laktyushkin
d5c40d5368 drm/amd/display: enable watermark range reporting to pplib 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:05 -04:00
Charlene Liu
ca3cba9c60 drm/amd/display: single channel bandwidth verses dual channel bandwidth 
DPM0, FCLK=MCLK, single channel bandwidth = dual channel bandwidth
for the rest of the DPM levels, single channel bandwidth = 1/2  dual channel bandwidth

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:04 -04:00
Harry Wentland
e61a04f1af drm/amd/display: Use MED update type if clip position changes 
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:03 -04:00