Commit Graph

1594 Commits

Author SHA1 Message Date
Paul Gortmaker
3b2663ca84 mips: delete non-required instances of include <linux/init.h>
None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>.  Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6320/
2014-01-24 22:39:56 +01:00
James Hogan
08596b0a75 MIPS: KVM: remove shadow_tlb code
The kvm_mips_init_shadow_tlb() function is called from
kvm_arch_vcpu_init() and initialises entries 0 to
current_cpu_data.tlbsize-1 of the virtual cpu's shadow_tlb[64] array.

However newer cores with FTLBs can have a tlbsize > 64, for example the
ProAptiv I'm testing on has a total tlbsize of 576. This causes
kvm_mips_init_shadow_tlb() to overflow the shadow_tlb[64] array and
overwrite the comparecount_timer among other things, causing a lock up
when starting a KVM guest.

Aside from kvm_mips_init_shadow_tlb() which only initialises it, the
shadow_tlb[64] array is only actually used by the following functions:
 - kvm_shadow_tlb_put() & kvm_shadow_tlb_load()
     These are never called. The only call sites are #if 0'd out.
 - kvm_mips_dump_shadow_tlbs()
     This is never called.

It was originally added for trap & emulate, but turned out to be
unnecessary so it was disabled.

So instead of fixing the shadow_tlb initialisation code, lets just
remove the shadow_tlb[64] array and the above functions entirely. The
only functional change here is the removal of broken shadow_tlb
initialisation. The rest just deletes dead code.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: Gleb Natapov <gleb@redhat.com>
Cc: kvm@vger.kernel.org
Cc: Sanjay Lal <sanjayl@kymasys.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6384/
2014-01-24 22:39:56 +01:00
Sebastian Andrzej Siewior
d3864767a8 mips/ide: flush dcache also if icache does not snoop dcache
If this is not done then the new just read data which remains in dcache
will not make it into icache on time. Thus the CPU loads invalid data
and executes crap. The result is that the user is not able to execute
anything from its IDE based media while reading plain data is still
working well.

This problem has been reported as Debian #404951
http://bugs.debian.org/404951
http://comments.gmane.org/gmane.linux.ide/45092

Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/2820/
2014-01-24 22:39:56 +01:00
Hauke Mehrtens
2b3ab0efba MIPS: BCM47XX: add board detection for Linksys WRT54GS V1
This adds board detection for Linksys WRT54GS V1.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6317/
2014-01-24 22:39:53 +01:00
Jayachandran C
194d315da8 MIPS: Netlogic: Remove XLR early serial setup
The early serial code is not needed because we already have early
printk support provided by common/earlycons.c

This change also fixes the following build error that occurs when
CONFIG_SERIAL_8250 is not configured for Netlogic XLR boards:

arch/mips/built-in.o: In function `nlm_early_serial_setup':
setup.c:(.init.text+0x274): undefined reference to `early_serial_setup'
make: *** [vmlinux] Error 1

Reported-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6083/
2014-01-24 22:39:50 +01:00
Ganesan Ramalingam
3262b21ef8 MIPS: Netlogic: XLP9XX USB support
XLP9XX has a USB 3.0 controller on-chip with 2 xHCI ports. The USB
block is similar to the one on XLP2XX, so update usb-init-xlp2.c
to handle XLP9XX as well.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6285/
2014-01-24 22:39:49 +01:00
Jayachandran C
b6ba1c5294 MIPS: PCI: Netlogic XLP9XX support
Add PCI support for Netlogic XLP9XX. The PCI registers and
SoC bus numbers have changed in XLP9XX.

Also skip a few (bus,dev,fn) combinations which have issues when
read.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6284/
2014-01-24 22:39:49 +01:00
Jayachandran C
98d4884ca5 MIPS: Netlogic: Add cpu to node mapping for XLP9XX
XLP9XX has 20 cores per node, opposed to 8 on earlier XLP8XX.
Update code that calculates node id from cpu id to handle this.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6283/
2014-01-24 22:39:49 +01:00
Jayachandran C
e7aa6c66b0 MIPS: Netlogic: XLP9XX bridge and DRAM code
Update bridge code. Add code to the XLP9XX registers for DRAM
size, limit and node when running on XLPXX

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6282/
2014-01-24 22:39:49 +01:00
Jayachandran C
61673de131 MIPS: Netlogic: XLP9XX UART offset
Update IO offset of the early console UART.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6281/
2014-01-24 22:39:48 +01:00
Jayachandran C
861c056953 MIPS: Netlogic: SYS block updates of XLP9XX
Add the SYS block registers for XLP9XX, most of them have changed.
The wakeup sequence has been updated to set the coherent mode from
the main thread rather than the woken up thread.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6280/
2014-01-24 22:39:48 +01:00
Jayachandran C
d150cef4e8 MIPS: Netlogic: XLP9XX PIC updates
Functions for the XLP9XX interrupt table entry format and other PIC
register changes.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6279/
2014-01-24 22:39:48 +01:00
Jayachandran C
5513c760db MIPS: Netlogic: update iomap.h for XLP9XX
Most IO block offsets have changed in XLP9XX. Update iomap.h to add the
new addresses of different SoC blocks like PIC, SYS, UART etc. that are
needed by the base code.

On XLP9xx, the SoC blocks of other nodes are seen on a PCI bus
corresponding to the node. Update iomap code to reflect this.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6277/
2014-01-24 22:39:48 +01:00
Jayachandran C
8907c55e72 MIPS: Netlogic: Identify XLP 9XX chip
Adds processor ID of XLP 9XX to asm/cpu.h.  Update netlogic/xlp-hal/xlp.h
to add cpu_is_xlp9xx() and to update cpu_is_xlpii() to support XLP 9XX.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6274/
2014-01-24 22:39:48 +01:00
Jayachandran C
cfec4c63f5 MIPS: Netlogic: Add macro for node present
Add macro nlm_node_present() that can be used to check if a node is present
in a multi-chip configuration. This can be used even when NUMA is not enabled.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6272/
2014-01-24 22:39:47 +01:00
Jayachandran C
ce59d0f7fe MIPS: Netlogic: Add topology.h for XLP family
Add mach-netlogic/topology.h which contains XLP cpu number to core and
node mapping.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6271/
2014-01-24 22:39:47 +01:00
Jayachandran C
c24a8a7a99 MIPS: Netlogic: Add MSI support for XLP
Add MSI chip and MSIX chip definitions.

For MSI, we map the link interrupt to a MSI link IRQ which will
do a second level of dispatch based on the MSI status register.

The MSI chip definitions use the MSI enable register to enable
and disable the MSI irqs.

For MSI-X, we split the 32 available MSI-X vectors across the
four PCIe links (8 each). These PIC interrupts generate an IRQ
per link which uses a second level dispatch as well.

The MSI-X chip definition uses the standard functions to enable
and disable interrupts.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6270/
2014-01-24 22:39:46 +01:00
Apelete Seketeli
c330fd90b1 MIPS: jz4740: update platform data for JZ4740 usb device controller
The platform data already available in tree for JZ4740 USB Device
Controller was previously used by an out-of-tree USB gadget driver
which was not relying on the musb driver and was written by Ingenic
and the Qi-Hardware community.

Update platform data for JZ4740 USB device controller to be used with
musb driver.

Signed-off-by: Apelete Seketeli <apelete@seketeli.net>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6265/
2014-01-24 22:39:46 +01:00
Paul Burton
8c0f8ab0e9 MIPS: clean up resume declaration
This patch cleans up the declaration of the resume function by replacing
void pointers with their correct types. The irrelevant & incorrect
comment preceeding the resume function is replaced by one documenting
its function.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6146/
2014-01-24 22:39:45 +01:00
Linus Torvalds
3aacd625f2 Merge branch 'akpm' (incoming from Andrew)
Merge second patch-bomb from Andrew Morton:
 - various misc bits
 - the rest of MM
 - add generic fixmap.h, use it
 - backlight updates
 - dynamic_debug updates
 - printk() updates
 - checkpatch updates
 - binfmt_elf
 - ramfs
 - init/
 - autofs4
 - drivers/rtc
 - nilfs
 - hfsplus
 - Documentation/
 - coredump
 - procfs
 - fork
 - exec
 - kexec
 - kdump
 - partitions
 - rapidio
 - rbtree
 - userns
 - memstick
 - w1
 - decompressors

* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (197 commits)
  lib/decompress_unlz4.c: always set an error return code on failures
  romfs: fix returm err while getting inode in fill_super
  drivers/w1/masters/w1-gpio.c: add strong pullup emulation
  drivers/memstick/host/rtsx_pci_ms.c: fix ms card data transfer bug
  userns: relax the posix_acl_valid() checks
  arch/sh/kernel/dwarf.c: use rbtree postorder iteration helper instead of solution using repeated rb_erase()
  fs-ext3-use-rbtree-postorder-iteration-helper-instead-of-opencoding-fix
  fs/ext3: use rbtree postorder iteration helper instead of opencoding
  fs/jffs2: use rbtree postorder iteration helper instead of opencoding
  fs/ext4: use rbtree postorder iteration helper instead of opencoding
  fs/ubifs: use rbtree postorder iteration helper instead of opencoding
  net/netfilter/ipset/ip_set_hash_netiface.c: use rbtree postorder iteration instead of opencoding
  rbtree/test: test rbtree_postorder_for_each_entry_safe()
  rbtree/test: move rb_node to the middle of the test struct
  rapidio: add modular rapidio core build into powerpc and mips branches
  partitions/efi: complete documentation of gpt kernel param purpose
  kdump: add /sys/kernel/vmcoreinfo ABI documentation
  kdump: fix exported size of vmcoreinfo note
  kexec: add sysctl to disable kexec_load
  fs/exec.c: call arch_pick_mmap_layout() only once
  ...
2014-01-23 19:11:50 -08:00
Linus Torvalds
7e21774db5 Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux
Pull clk framework changes from Mike Turquette:
 "The first half of the clk framework pull request is made up almost
  entirely of new platform/driver support.  There are some conversions
  of existing drivers to the common-clock Device Tree binding, and a few
  non-critical fixes to the framework.

  Due to an entirely unnecessary cyclical dependency with the arm-soc
  tree this pull request is broken into two pieces.  The second piece
  will be sent out after arm-soc sends you the pull request that merged
  in core support for the HiSilicon 3620 platform.  That same pull
  request from arm-soc depends on this pull request to merge in those
  HiSilicon bits without causing build failures"

[ Just did the ARM SoC merges, so getting ready for the second clk tree
  pull request   - Linus ]

* tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux: (97 commits)
  devicetree: bindings: Document qcom,mmcc
  devicetree: bindings: Document qcom,gcc
  clk: qcom: Add support for MSM8660's global clock controller (GCC)
  clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)
  clk: qcom: Add support for MSM8974's global clock controller (GCC)
  clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)
  clk: qcom: Add support for MSM8960's global clock controller (GCC)
  clk: qcom: Add reset controller support
  clk: qcom: Add support for branches/gate clocks
  clk: qcom: Add support for root clock generators (RCGs)
  clk: qcom: Add support for phase locked loops (PLLs)
  clk: qcom: Add a regmap type clock struct
  clk: Add set_rate_and_parent() op
  reset: Silence warning in reset-controller.h
  clk: sirf: re-arch to make the codes support both prima2 and atlas6
  clk: composite: pass mux_hw into determine_rate
  clk: shmobile: Fix MSTP clock array initialization
  clk: shmobile: Fix MSTP clock index
  ARM: dts: Add clock provider specific properties to max77686 node
  clk: max77686: Register OF clock provider
  ...
2014-01-23 18:56:08 -08:00
Mark Salter
19fd9629a7 mips: use generic fixmap.h
Signed-off-by: Mark Salter <msalter@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-01-23 16:36:54 -08:00
Qais Yousef
87c99203fe MIPS: include linux/types.h
The file uses u16 type but doesn't include its definition explicitly

I was getting this error when including this header in my driver:

  arch/mips/include/asm/mipsregs.h:644:33: error: unknown type name ‘u16’

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Reviewed-by: Steven J. Hill <Steven.Hill@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6212/
2014-01-23 13:02:37 +01:00
Florian Fainelli
e95acd3d0d MIPS: BCM63XX: use linux/serial_bcm63xx.h
Update the early_printk code to include linux/serial_bcm63xx.h which
provides the definitions for the UART block registers. While at it,
remove the inclusion of serial_bcm63xx.h which was just there to allow
smooth transition.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6203/
2014-01-23 13:02:36 +01:00
Florian Fainelli
74e200c781 MIPS: BCM63XX: move UART register definitions
Move the BCM63XX UART driver definitions to
include/linux/serial_bcm63xx.h such that we do not rely on the MIPS
BCM63XX code to provide these for us.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6202/
2014-01-23 13:02:36 +01:00
David Daney
d617f9e9b8 MIPS: OCTEON: Supply OCTEON+ USB nodes in internal device trees.
This will be needed by the next patch to use said nodes for probing
via the device tree.

Signed-off-by: David Daney <david.daney@cavium.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6185/
2014-01-23 13:02:35 +01:00
Paul Burton
ae0d7cbc99 MIPS: Malta: mux & enable SERIRQ interrupt
This patch causes the kernel to mux the SERIRQ interrupt to the SERIRQ
pin of the PIIX4 and to enable that interrupt. The kernel depends upon
the interrupt when using the SuperIO UARTs (ttyS0 & ttyS1) but
previously would not configure it, instead relying upon the bootloader
having done so. If that is not the case then the typical result is that
the system appears to hang once it reaches userland as no output is
displayed on the UART.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6182/
2014-01-23 13:02:35 +01:00
Guenter Roeck
63238f2cc5 MIPS: Fix build error seen in some configurations
The following build error is seen if CONFIG_32BIT is undefined,
CONFIG_64BIT is defined, and CONFIG_MIPS32_O32 is undefined.

asm/syscall.h: In function 'mips_get_syscall_arg':
arch/mips/include/asm/syscall.h:32:16: error: unused variable 'usp' [-Werror=unused-variable]
cc1: all warnings being treated as errors

Fixes: c0ff3c53d4 ('MIPS: Enable HAVE_ARCH_TRACEHOOK')
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6160/
2014-01-23 13:02:34 +01:00
Eric W. Biederman
f58437f1f9 MIPS: VPE: Remove vpe_getuid and vpe_getgid
The linux build-bot recently reported a build error in arch/mips/kernel/vpe.c

     tree:   git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace.git for-linus
     head:   261000a56b
     commit: 261000a56b [4/4] userns:  userns: Remove UIDGID_STRICT_TYPE_CHECKS
     config: make ARCH=mips maltaaprp_defconfig

     All error/warnings:

        arch/mips/kernel/vpe.c: In function 'vpe_open':
     >> arch/mips/kernel/vpe.c:1086:9: error: incompatible types when assigning to type 'unsigned int' from type 'kuid_t'
     >> arch/mips/kernel/vpe.c:1087:9: error: incompatible types when assigning to type 'unsigned int' from type 'kgid_t'

     vim +1086 arch/mips/kernel/vpe.c

     863abad4 Jesper Juhl   2010-10-30  1080			return -ENOMEM;
     863abad4 Jesper Juhl   2010-10-30  1081  		}
     e01402b1 Ralf Baechle  2005-07-14  1082  		v->plen = P_SIZE;
     e01402b1 Ralf Baechle  2005-07-14  1083  		v->load_addr = NULL;
     e01402b1 Ralf Baechle  2005-07-14  1084  		v->len = 0;
     e01402b1 Ralf Baechle  2005-07-14  1085
     d76b0d9b David Howells 2008-11-14 @1086		v->uid = filp->f_cred->fsuid;
     d76b0d9b David Howells 2008-11-14 @1087  		v->gid = filp->f_cred->fsgid;
     2600990e Ralf Baechle  2006-04-05  1088
     2600990e Ralf Baechle  2006-04-05  1089		v->cwd[0] = 0;
     2600990e Ralf Baechle  2006-04-05  1090 	 	ret = getcwd(v->cwd, VPE_PATH_MAX);

When examining the code to see what v->uid and v->gid were used for I
discovered that the only users in the kernel are vpe_getuid and
vpe_getgid, and that vpe_getuid and vpe_getgid are never called.

So instead of proposing a conversion to use kuid_t and kgid_t instead
of unsigned int/int as I normally would let's just kill this dead code
so no one has to worry about it further.

Deng-Cheng Zhu said:

This is a good catch. vpe_get[u|g]id was originally used by KSPD which
has been removed.

Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Reviewed-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2014-01-22 15:20:46 -08:00
Felix Fietkau
885014bcf2 MIPS: improve checks for noncoherent DMA
Only one MIPS development board actually supports enabling/disabling DMA
coherency at runtime, so it's not a good idea to push the overhead of
checking that configuration setting onto every other supported target as
well.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5912/
2014-01-22 20:43:10 +01:00
Steven J. Hill
5792bf6438 MIPS: APRP: Code formatting clean-ups.
Clean-up code according to the 'checkpatch.pl' script.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6097/
Reviewed-by: John Crispin <blogic@openwrt.org>
2014-01-22 20:19:02 +01:00
Deng-Cheng Zhu
1336113a6c MIPS: APRP: Add support for Malta CMP platform.
Malta with multi-core CM platforms can now use APRP functionality.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6096/
2014-01-22 20:19:02 +01:00
Deng-Cheng Zhu
da615cf603 MIPS: APRP: Add RTLX API support for CMP platforms.
This patch adds RTLX API support for platforms having a CMP.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6095/
Reviewed-by: John Crispin <blogic@openwrt.org>
2014-01-22 20:19:02 +01:00
Deng-Cheng Zhu
2c973ef0cc MIPS: APRP: Split RTLX support into separate files.
Split the RTLX functionality in preparation for adding support for CMP
platforms. Common functions remain in the original file and a new file
contains code specific to platforms that do not have a CMP.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6093/
Reviewed-by: John Crispin <blogic@openwrt.org>
2014-01-22 20:19:02 +01:00
Deng-Cheng Zhu
1a2a6d7e88 MIPS: APRP: Split VPE loader into separate files.
Split the VPE functionality in preparation for adding support
for CMP platforms. Common functions remain in the original file
and a new file contains code specific to platforms that do not
have a CMP present.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6094/
2014-01-22 20:19:01 +01:00
Leonid Yegoshin
26ab96dfa9 MIPS: Add support for interAptiv cores
The interAptiv is a power-efficient multi-core microprocessor
for use in system-on-chip (SoC) applications. The interAptiv combines
a multi-threading pipeline with a coherence manager to deliver improved
computational throughput and power efficiency. The interAptiv can
contain one to four MIPS32R3 interAptiv cores, system level
coherence manager with L2 cache, optional coherent I/O port,
and optional floating point unit.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6163/
2014-01-22 20:19:01 +01:00
Leonid Yegoshin
0ce7d58ee0 MIPS: Add processor identifiers for the interAptiv processors
Add processor identifiers for UP and MT interAptiv processors.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6151/
2014-01-22 20:19:00 +01:00
Leonid Yegoshin
75b5b5e0a2 MIPS: Add support for FTLBs
The Fixed Page Size TLB (FTLB) is a set-associative dual entry TLB. Its
purpose is to reduce the number of TLB misses by increasing the effective
TLB size and keep the implementation complexity to minimum levels.
A supported core can have both VTLB and FTLB.

Reviewed-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6139/
2014-01-22 20:19:00 +01:00
Leonid Yegoshin
198bb4cef1 MIPS: Add function for flushing the TLB using the TLBINV instruction
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6136/
2014-01-22 20:19:00 +01:00
Leonid Yegoshin
708ac4b870 MIPS: Add support for the proAptiv cores
The proAptiv Multiprocessing System is a power efficient multi-core
microprocessor for use in system-on-chip (SoC) applications.
The proAptiv Multiprocessing System combines a deep pipeline
with multi-issue out of order execution for improved computational
throughput. The proAptiv Multiprocessing System can contain one to
six MIPS32r3 proAptiv cores, system level coherence
manager with L2 cache, optional coherent I/O port, and optional
floating point unit.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6134/
2014-01-22 20:18:59 +01:00
Leonid Yegoshin
76f59e329c MIPS: Add processor identifiers for the proAptiv processors
Add processor identifiers for single core and multi-core
proAptiv processors.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6133/
2014-01-22 20:18:59 +01:00
Leonid Yegoshin
6e7f8b8e47 MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLB
For MIPS32R3 supported cores, the EHINV bit needs to be set when
invalidating the TLB. This is necessary because the legacy software
method of representing an invalid TLB entry using an unmapped address
value is not guaranteed to work.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6132/
2014-01-22 20:18:59 +01:00
Steven J. Hill
4a0156fbfb MIPS: features: Add initial support for Segmentation Control registers
MIPS32R3 introduced a new set of Segmentation Control registers which
increase the flexibility of the segmented-based memory scheme.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6131/
2014-01-22 20:18:58 +01:00
Leonid Yegoshin
1745c1ef88 MIPS: features: Add initial support for TLBINVF capable cores
New Aptiv cores support the TLBINVF instruction for flushing
the VTLB.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6130/
2014-01-22 20:18:58 +01:00
Markos Chandras
c01905eeee MIPS: mm: Move UNIQUE_ENTRYHI macro to a header file
The UNIQUE_ENTRYHI definition was duplicated whenever there
was the need to flush the TLB entries. We move this common
definition to a header file.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6129/
2014-01-22 20:18:58 +01:00
Leonid Yegoshin
691038ba45 MIPS: Add missing bits for Config registers
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6128/
2014-01-22 20:18:58 +01:00
Hauke Mehrtens
d775c966c0 MIPS: BCM47XX: add cpu-feature-overrides.h
The BCM47XX SoC code missed a cpu-feature-overrides.h header file, this
patch adds it. This code supports a long line of SoCs with different
features so for some features we still have to rely on the runtime
detection.

This was crated by checking the features of a BCM4712, BCM4704,
BCM5354, BCM4716 and BCM4706 SoC and then tested on these SoCs. There
are some SoCs missing but I hope they do not have any more or less
features.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6289/
2014-01-22 20:18:55 +01:00
Hauke Mehrtens
dd5732850e MIPS: BCM47XX: only print SoC name in system type in cpuinfo
Recently the output of "system type" in  /proc/cpuinfo was changed to
Broadcom BCM4730 (Some sample board), but it is better to just print
the SoC name in the "system type" entry. The board name will be added
in the machine entry later.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5865/
2014-01-22 20:18:54 +01:00
Jonas Gorski
baaac02e9d MIPS: cpu-type: guard BMIPS variants with SYS_HAS_CPU_BMIPS*
BMIPS32 and  BMIPS3300 also need to be available for MIPS32R1, as
bcm47xx might not select BMIPS.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6245/
2014-01-22 20:18:54 +01:00
Jonas Gorski
04fa8bf7c0 MIPS: BMIPS: add a smp ops registration helper
Add a helper similar to the generic register_XXX_smp_ops() for bmips.
Register SMP UP ops in case of BMIPS32/3300.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6248/
2014-01-22 20:18:52 +01:00