rtlwifi: rtl8192{c,u}: Remove CamelCase variables
This patch affects modules rtl8192ce, rtl8192cu, and rtl8192com. The following checkpatch exceptions are also fixed: CHECK: No space is necessary after a cast #237: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c:90: + (u8 *) (&rfstate)); CHECK: No space is necessary after a cast #744: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c:329: + pwr_val[i] = (u8) ((writeval & (0x7f << CHECK: No space is necessary after a cast #784: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c:365: + (u8) writeval); CHECK: spaces preferred around that '/' (ctx:VxV) #963: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:513: + txqpageunit = txqpagenum/outepnum; ^ CHECK: Unnecessary parentheses around 'outepnum > 1' #975: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:521: + if ((outepnum > 1) && (txqremaininpage)) CHECK: Alignment should match open parenthesis #1059: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c:617: +static void _rtl92cu_init_chipn_two_out_ep_priority(struct ieee80211_hw *hw, bool wmm_enable, ERROR: "foo * bar" should be "foo *bar" #1940: FILE: drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c:591: +void rtl92cu_fill_fake_txdesc(struct ieee80211_hw *hw, u8 *pdesc, Note that not all checkpatch exceptions are addressed. Those will be handled in later patches. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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@@ -27,7 +27,7 @@
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#define DM_DIG_FA_TH1 0x100
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#define DM_DIG_FA_TH2 0x200
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#define RXPATHSELECTION_SS_TH_lOW 30
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#define RXPATHSELECTION_SS_TH_LOW 30
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#define RXPATHSELECTION_DIFF_TH 18
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#define DM_RATR_STA_INIT 0
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@@ -38,7 +38,7 @@
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#define CTS2SELF_THVAL 30
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#define REGC38_TH 20
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#define WAIOTTHVal 25
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#define WAIOTTHVAL 25
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#define TXHIGHPWRLEVEL_NORMAL 0
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#define TXHIGHPWRLEVEL_LEVEL1 1
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@@ -57,27 +57,27 @@ static void _rtl92c_write_fw(struct ieee80211_hw *hw,
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RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, "FW size is %d bytes,\n", size);
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is_version_b = IS_NORMAL_CHIP(version);
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if (is_version_b) {
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u32 pageNums, remainsize;
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u32 pagenums, remainsize;
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u32 page, offset;
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if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE)
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rtl_fill_dummy(bufferptr, &size);
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pageNums = size / FW_8192C_PAGE_SIZE;
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pagenums = size / FW_8192C_PAGE_SIZE;
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remainsize = size % FW_8192C_PAGE_SIZE;
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if (pageNums > 4)
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if (pagenums > 4)
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pr_err("Page numbers should not greater then 4\n");
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for (page = 0; page < pageNums; page++) {
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for (page = 0; page < pagenums; page++) {
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offset = page * FW_8192C_PAGE_SIZE;
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rtl_fw_page_write(hw, page, (bufferptr + offset),
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FW_8192C_PAGE_SIZE);
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}
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if (remainsize) {
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offset = pageNums * FW_8192C_PAGE_SIZE;
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page = pageNums;
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offset = pagenums * FW_8192C_PAGE_SIZE;
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page = pagenums;
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rtl_fw_page_write(hw, page, (bufferptr + offset),
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remainsize);
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}
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@@ -96,7 +96,7 @@ static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
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do {
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value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
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} while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
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(!(value32 & FWDL_ChkSum_rpt)));
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(!(value32 & FWDL_CHKSUM_RPT)));
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if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
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pr_err("chksum report fail! REG_MCUFWDL:0x%08x .\n",
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@@ -217,7 +217,7 @@ bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
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EXPORT_SYMBOL(_rtl92c_phy_bb8192c_config_parafile);
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void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
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void _rtl92c_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw,
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u32 regaddr, u32 bitmask,
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u32 data)
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{
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@@ -371,7 +371,7 @@ void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
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rtlphy->pwrgroup_cnt++;
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}
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}
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EXPORT_SYMBOL(_rtl92c_store_pwrIndex_diffrate_offset);
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EXPORT_SYMBOL(_rtl92c_store_pwrindex_diffrate_offset);
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void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw)
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{
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@@ -430,10 +430,10 @@ void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw)
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rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset =
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RFPGA0_XB_LSSIPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = rFPGA0_XAB_RFPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_B].rflssi_select = rFPGA0_XAB_RFPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = rFPGA0_XCD_RFPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = rFPGA0_XCD_RFPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = RFPGA0_XAB_RFPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_B].rflssi_select = RFPGA0_XAB_RFPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_C].rflssi_select = RFPGA0_XCD_RFPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = RFPGA0_XCD_RFPARAMETER;
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rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE;
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rtlphy->phyreg_def[RF90_PATH_B].rftxgain_stage = RFPGA0_TXGAINSTAGE;
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@@ -1098,19 +1098,19 @@ static void _rtl92c_phy_reload_mac_registers(struct ieee80211_hw *hw,
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static void _rtl92c_phy_path_adda_on(struct ieee80211_hw *hw,
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u32 *addareg, bool is_patha_on, bool is2t)
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{
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u32 pathOn;
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u32 pathon;
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u32 i;
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pathOn = is_patha_on ? 0x04db25a4 : 0x0b1b25a4;
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pathon = is_patha_on ? 0x04db25a4 : 0x0b1b25a4;
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if (false == is2t) {
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pathOn = 0x0bdb25a0;
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pathon = 0x0bdb25a0;
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rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0);
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} else {
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rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathOn);
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rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathon);
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}
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for (i = 1; i < IQK_ADDA_REG_NUM; i++)
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rtl_set_bbreg(hw, addareg[i], MASKDWORD, pathOn);
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rtl_set_bbreg(hw, addareg[i], MASKDWORD, pathon);
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}
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static void _rtl92c_phy_mac_setting_calibration(struct ieee80211_hw *hw,
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@@ -1339,7 +1339,7 @@ static void _rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw,
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if (is_hal_stop(rtlhal)) {
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rtl_set_bbreg(hw, REG_LEDCFG0, BIT(23), 0x01);
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rtl_set_bbreg(hw, rFPGA0_XAB_RFPARAMETER, BIT(13), 0x01);
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rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(13), 0x01);
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}
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if (is2t) {
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if (bmain)
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@@ -22,9 +22,9 @@
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#define LOOP_LIMIT 5
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#define MAX_STALL_TIME 50
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#define AntennaDiversityValue 0x80
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#define ANTENNADIVERSITYVALUE 0x80
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#define MAX_TXPWR_IDX_NMODE_92S 63
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#define Reset_Cnt_Limit 3
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#define RESET_CNT_LIMIT 3
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#define IQK_ADDA_REG_NUM 16
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#define IQK_MAC_REG_NUM 4
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@@ -220,7 +220,7 @@ void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
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enum radio_path rfpath, u32 offset,
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u32 data);
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bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw);
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void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
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void _rtl92c_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw,
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u32 regaddr, u32 bitmask,
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u32 data);
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bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
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