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net: dsa: b53: Add bridge support

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Add support for HW bridging by tying the ports together in the same port
VLAN mask when they belong to the same bridge, and isolating them to be
alone with the CPU port when they are not.

Propagate STP states from the bridge layer to the switch's HW mapping
when requested.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Florian Fainelli
2016-06-09 18:23:56 -07:00
committed by David S. Miller
parent 1da6df85c6
commit ff39c2d686
3 changed files with 174 additions and 3 deletions
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12
drivers/net/dsa/b53/b53_regs.h
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@@ -65,6 +65,12 @@
#define PORT_CTRL_RX_MCST_EN BIT(3) /* Multicast RX (P8 only) */
#define PORT_CTRL_RX_UCST_EN BIT(4) /* Unicast RX (P8 only) */
#define PORT_CTRL_STP_STATE_S 5
#define PORT_CTRL_NO_STP (0 << PORT_CTRL_STP_STATE_S)
#define PORT_CTRL_DIS_STATE (1 << PORT_CTRL_STP_STATE_S)
#define PORT_CTRL_BLOCK_STATE (2 << PORT_CTRL_STP_STATE_S)
#define PORT_CTRL_LISTEN_STATE (3 << PORT_CTRL_STP_STATE_S)
#define PORT_CTRL_LEARN_STATE (4 << PORT_CTRL_STP_STATE_S)
#define PORT_CTRL_FWD_STATE (5 << PORT_CTRL_STP_STATE_S)
#define PORT_CTRL_STP_STATE_MASK (0x7 << PORT_CTRL_STP_STATE_S)
/* SMP Control Register (8 bit) */
@@ -145,6 +151,12 @@
#define FAST_AGE_MC BIT(5)
#define FAST_AGE_DONE BIT(7)
/* Fast Aging Port Control register (8 bit) */
#define B53_FAST_AGE_PORT_CTRL 0x89
/* Fast Aging VID Control register (16 bit) */
#define B53_FAST_AGE_VID_CTRL 0x8a
/*************************************************************************
* Status Page registers
*************************************************************************/