xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ARM: GIC: consolidate gic_cpu_base_addr to common GIC code

Browse Source 
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt.  Move this into the common GIC code.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
2010-12-04 16:13:29 +00:00
parent 384895330e
commit ff2e27ae0b
18 changed files with 21 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/common/gic.c
View File

@@ -35,6 +35,9 @@
static DEFINE_SPINLOCK(irq_controller_lock);
/* Address of GIC 0 CPU interface */
void __iomem *gic_cpu_base_addr;
struct gic_chip_data {
unsigned int irq_offset;
void __iomem *dist_base;
@@ -317,6 +320,8 @@ static void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
void __iomem *dist_base, void __iomem *cpu_base)
{
if (gic_nr == 0)
gic_cpu_base_addr = cpu_base;
gic_dist_init(gic_nr, dist_base, irq_start);
gic_cpu_init(gic_nr, cpu_base);
}