xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

hwmon: (zl6100) Enable interval between chip accesses for all chips

Browse Source 
Intersil reports that all chips supported by the zl6100 driver require
an interval between chip accesses, even ZL2004 and ZL6105 which were thought
to be safe.

Reported-by: Vivek Gani <vgani@intersil.com>
Cc: stable@vger.kernel.org # 3.2+
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
This commit is contained in:
Guenter Roeck
2012-03-13 09:05:14 -07:00
parent c43524b580
commit fecfb64422
2 changed files with 9 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
Documentation/hwmon/zl6100
View File

@@ -88,14 +88,12 @@ Module parameters
delay
-----
Some Intersil/Zilker Labs DC-DC controllers require a minimum interval between
I2C bus accesses. According to Intersil, the minimum interval is 2 ms, though
1 ms appears to be sufficient and has not caused any problems in testing.
The problem is known to affect ZL6100, ZL2105, and ZL2008. It is known not to
affect ZL2004 and ZL6105. The driver automatically sets the interval to 1 ms
except for ZL2004 and ZL6105. To enable manual override, the driver provides a
writeable module parameter, 'delay', which can be used to set the interval to
a value between 0 and 65,535 microseconds.
Intersil/Zilker Labs DC-DC controllers require a minimum interval between I2C
bus accesses. According to Intersil, the minimum interval is 2 ms, though 1 ms
appears to be sufficient and has not caused any problems in testing. The problem
is known to affect all currently supported chips. For manual override, the
driver provides a writeable module parameter, 'delay', which can be used to set
the interval to a value between 0 and 65,535 microseconds.
Sysfs entries