Merge tag 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas: "Host bridge hotplug - Protect acpi_pci_drivers and acpi_pci_roots (Taku Izumi) - Clear host bridge resource info to avoid issue when releasing (Yinghai Lu) - Notify acpi_pci_drivers when hot-plugging host bridges (Jiang Liu) - Use standard list ops for acpi_pci_drivers (Jiang Liu) Device hotplug - Use pci_get_domain_bus_and_slot() to close hotplug races (Jiang Liu) - Remove fakephp driver (Bjorn Helgaas) - Fix VGA ref count in hotplug remove path (Yinghai Lu) - Allow acpiphp to handle PCIe ports without native hotplug (Jiang Liu) - Implement resume regardless of pciehp_force param (Oliver Neukum) - Make pci_fixup_irqs() work after init (Thierry Reding) Miscellaneous - Add pci_pcie_type(dev) and remove pci_dev.pcie_type (Yijing Wang) - Factor out PCI Express Capability accessors (Jiang Liu) - Add pcibios_window_alignment() so powerpc EEH can use generic resource assignment (Gavin Shan) - Make pci_error_handlers const (Stephen Hemminger) - Cleanup drivers/pci/remove.c (Bjorn Helgaas) - Improve Vendor-Specific Extended Capability support (Bjorn Helgaas) - Use standard list ops for bus->devices (Bjorn Helgaas) - Avoid kmalloc in pci_get_subsys() and pci_get_class() (Feng Tang) - Reassign invalid bus number ranges (Intel DP43BF workaround) (Yinghai Lu)" * tag 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (102 commits) PCI: acpiphp: Handle PCIe ports without native hotplug capability PCI/ACPI: Use acpi_driver_data() rather than searching acpi_pci_roots PCI/ACPI: Protect acpi_pci_roots list with mutex PCI/ACPI: Use acpi_pci_root info rather than looking it up again PCI/ACPI: Pass acpi_pci_root to acpi_pci_drivers' add/remove interface PCI/ACPI: Protect acpi_pci_drivers list with mutex PCI/ACPI: Notify acpi_pci_drivers when hot-plugging PCI root bridges PCI/ACPI: Use normal list for struct acpi_pci_driver PCI/ACPI: Use DEVICE_ACPI_HANDLE rather than searching acpi_pci_roots PCI: Fix default vga ref_count ia64/PCI: Clear host bridge aperture struct resource x86/PCI: Clear host bridge aperture struct resource PCI: Stop all children first, before removing all children Revert "PCI: Use hotplug-safe pci_get_domain_bus_and_slot()" PCI: Provide a default pcibios_update_irq() PCI: Discard __init annotations for pci_fixup_irqs() and related functions PCI: Use correct type when freeing bus resource list PCI: Check P2P bridge for invalid secondary/subordinate range PCI: Convert "new_id"/"remove_id" into generic pci_bus driver attributes xen-pcifront: Use hotplug-safe pci_get_domain_bus_and_slot() ...
This commit is contained in:
@@ -8742,7 +8742,7 @@ static void bnx2_io_resume(struct pci_dev *pdev)
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rtnl_unlock();
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}
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static struct pci_error_handlers bnx2_err_handler = {
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static const struct pci_error_handlers bnx2_err_handler = {
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.error_detected = bnx2_io_error_detected,
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.slot_reset = bnx2_io_slot_reset,
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.resume = bnx2_io_resume,
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@@ -1162,14 +1162,9 @@ static int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func,
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static u8 bnx2x_is_pcie_pending(struct pci_dev *dev)
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{
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int pos;
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u16 status;
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pos = pci_pcie_cap(dev);
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if (!pos)
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return false;
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pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status);
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pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status);
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return status & PCI_EXP_DEVSTA_TRPND;
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}
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@@ -6135,8 +6130,7 @@ static void bnx2x_init_pxp(struct bnx2x *bp)
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u16 devctl;
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int r_order, w_order;
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pci_read_config_word(bp->pdev,
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pci_pcie_cap(bp->pdev) + PCI_EXP_DEVCTL, &devctl);
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pcie_capability_read_word(bp->pdev, PCI_EXP_DEVCTL, &devctl);
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DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl);
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w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
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if (bp->mrrs == -1)
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@@ -9380,7 +9374,7 @@ static int __devinit bnx2x_prev_mark_path(struct bnx2x *bp)
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static int __devinit bnx2x_do_flr(struct bnx2x *bp)
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{
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int i, pos;
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int i;
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u16 status;
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struct pci_dev *dev = bp->pdev;
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@@ -9397,16 +9391,12 @@ static int __devinit bnx2x_do_flr(struct bnx2x *bp)
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return -EINVAL;
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}
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pos = pci_pcie_cap(dev);
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if (!pos)
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return -ENOTTY;
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/* Wait for Transaction Pending bit clean */
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for (i = 0; i < 4; i++) {
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if (i)
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msleep((1 << (i - 1)) * 100);
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pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status);
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pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status);
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if (!(status & PCI_EXP_DEVSTA_TRPND))
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goto clear;
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}
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@@ -12167,7 +12157,7 @@ static void bnx2x_io_resume(struct pci_dev *pdev)
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rtnl_unlock();
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}
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static struct pci_error_handlers bnx2x_err_handler = {
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static const struct pci_error_handlers bnx2x_err_handler = {
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.error_detected = bnx2x_io_error_detected,
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.slot_reset = bnx2x_io_slot_reset,
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.resume = bnx2x_io_resume,
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@@ -3653,17 +3653,9 @@ static int tg3_power_down_prepare(struct tg3 *tp)
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tg3_enable_register_access(tp);
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/* Restore the CLKREQ setting. */
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if (tg3_flag(tp, CLKREQ_BUG)) {
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u16 lnkctl;
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pci_read_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
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&lnkctl);
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lnkctl |= PCI_EXP_LNKCTL_CLKREQ_EN;
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pci_write_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
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lnkctl);
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}
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if (tg3_flag(tp, CLKREQ_BUG))
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pcie_capability_set_word(tp->pdev, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_CLKREQ_EN);
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misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL);
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tw32(TG3PCI_MISC_HOST_CTRL,
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@@ -4434,20 +4426,13 @@ relink:
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/* Prevent send BD corruption. */
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if (tg3_flag(tp, CLKREQ_BUG)) {
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u16 oldlnkctl, newlnkctl;
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pci_read_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
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&oldlnkctl);
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if (tp->link_config.active_speed == SPEED_100 ||
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tp->link_config.active_speed == SPEED_10)
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newlnkctl = oldlnkctl & ~PCI_EXP_LNKCTL_CLKREQ_EN;
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pcie_capability_clear_word(tp->pdev, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_CLKREQ_EN);
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else
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newlnkctl = oldlnkctl | PCI_EXP_LNKCTL_CLKREQ_EN;
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if (newlnkctl != oldlnkctl)
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pci_write_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) +
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PCI_EXP_LNKCTL, newlnkctl);
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pcie_capability_set_word(tp->pdev, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_CLKREQ_EN);
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}
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if (current_link_up != netif_carrier_ok(tp->dev)) {
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@@ -8054,7 +8039,7 @@ static int tg3_chip_reset(struct tg3 *tp)
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udelay(120);
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if (tg3_flag(tp, PCI_EXPRESS) && pci_pcie_cap(tp->pdev)) {
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if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) {
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u16 val16;
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if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A0) {
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@@ -8071,24 +8056,17 @@ static int tg3_chip_reset(struct tg3 *tp)
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}
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/* Clear the "no snoop" and "relaxed ordering" bits. */
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pci_read_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) + PCI_EXP_DEVCTL,
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&val16);
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val16 &= ~(PCI_EXP_DEVCTL_RELAX_EN |
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PCI_EXP_DEVCTL_NOSNOOP_EN);
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val16 = PCI_EXP_DEVCTL_RELAX_EN | PCI_EXP_DEVCTL_NOSNOOP_EN;
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/*
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* Older PCIe devices only support the 128 byte
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* MPS setting. Enforce the restriction.
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*/
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if (!tg3_flag(tp, CPMU_PRESENT))
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val16 &= ~PCI_EXP_DEVCTL_PAYLOAD;
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pci_write_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) + PCI_EXP_DEVCTL,
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val16);
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val16 |= PCI_EXP_DEVCTL_PAYLOAD;
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pcie_capability_clear_word(tp->pdev, PCI_EXP_DEVCTL, val16);
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/* Clear error status */
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pci_write_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) + PCI_EXP_DEVSTA,
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pcie_capability_write_word(tp->pdev, PCI_EXP_DEVSTA,
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PCI_EXP_DEVSTA_CED |
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PCI_EXP_DEVSTA_NFED |
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PCI_EXP_DEVSTA_FED |
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@@ -14565,9 +14543,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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tg3_flag_set(tp, PCI_EXPRESS);
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pci_read_config_word(tp->pdev,
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pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
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&lnkctl);
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pcie_capability_read_word(tp->pdev, PCI_EXP_LNKCTL, &lnkctl);
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if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN) {
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if (GET_ASIC_REV(tp->pci_chip_rev_id) ==
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ASIC_REV_5906) {
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@@ -16397,7 +16373,7 @@ done:
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rtnl_unlock();
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}
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static struct pci_error_handlers tg3_err_handler = {
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static const struct pci_error_handlers tg3_err_handler = {
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.error_detected = tg3_io_error_detected,
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.slot_reset = tg3_io_slot_reset,
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.resume = tg3_io_resume
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