dmaengine: Use dma_sg_len(sg) instead of sg->length
sg->length may or may not contain the length of the dma region to transfer, depending on the architecture - dma_sg_len(sg) always will though. For the architectures which use the drivers modified by this patch it probably is the case that sg->length contains the dma transfer length. But to be consistent and future proof change them to use dma_sg_len. To quote Russel King: sg->length is meaningless to something performing DMA. In cases where sg_dma_len(sg) and sg->length are the same storage, then there's no problem. But scatterlists _can_ (and one some architectures) do split them - especially when you have an IOMMU which can allow you to combine a scatterlist into fewer entries. So, anything using sg->length for the size of a scatterlist's DMA transfer _after_ a call to dma_map_sg() is almost certainly buggy. The patch has been generated using the following coccinelle patch: <smpl> @@ struct scatterlist *sg; expression X; @@ -sg[X].length +sg_dma_len(&sg[X]) @@ struct scatterlist *sg; @@ -sg->length +sg_dma_len(sg) </smpl> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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committed by
Vinod Koul

parent
cbb796ccd8
commit
fdaf9c4b22
@@ -227,7 +227,7 @@ static inline int imxdma_sg_next(struct imxdma_desc *d)
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struct scatterlist *sg = d->sg;
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unsigned long now;
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now = min(d->len, sg->length);
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now = min(d->len, sg_dma_len(sg));
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if (d->len != IMX_DMA_LENGTH_LOOP)
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d->len -= now;
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@@ -763,16 +763,16 @@ static struct dma_async_tx_descriptor *imxdma_prep_slave_sg(
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desc = list_first_entry(&imxdmac->ld_free, struct imxdma_desc, node);
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for_each_sg(sgl, sg, sg_len, i) {
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dma_length += sg->length;
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dma_length += sg_dma_len(sg);
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}
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switch (imxdmac->word_size) {
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case DMA_SLAVE_BUSWIDTH_4_BYTES:
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if (sgl->length & 3 || sgl->dma_address & 3)
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if (sg_dma_len(sgl) & 3 || sgl->dma_address & 3)
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return NULL;
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break;
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case DMA_SLAVE_BUSWIDTH_2_BYTES:
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if (sgl->length & 1 || sgl->dma_address & 1)
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if (sg_dma_len(sgl) & 1 || sgl->dma_address & 1)
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return NULL;
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break;
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case DMA_SLAVE_BUSWIDTH_1_BYTE:
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@@ -831,13 +831,13 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic(
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imxdmac->sg_list[i].page_link = 0;
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imxdmac->sg_list[i].offset = 0;
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imxdmac->sg_list[i].dma_address = dma_addr;
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imxdmac->sg_list[i].length = period_len;
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sg_dma_len(&imxdmac->sg_list[i]) = period_len;
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dma_addr += period_len;
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}
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/* close the loop */
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imxdmac->sg_list[periods].offset = 0;
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imxdmac->sg_list[periods].length = 0;
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sg_dma_len(&imxdmac->sg_list[periods]) = 0;
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imxdmac->sg_list[periods].page_link =
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((unsigned long)imxdmac->sg_list | 0x01) & ~0x02;
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