xiaomi-sm8450/android_kernel_xiaomi_sm8450
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sh: Convert to new function names

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Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
此提交包含在：
Thomas Gleixner
2011-03-24 16:31:17 +01:00
父節點 a821b2793e
當前提交 fcb8918fd2
共有 16 個檔案被更改，包括 65 行新增 和 65 行删除
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12
arch/sh/boards/board-magicpanelr2.c
查看文件

@@ -388,12 +388,12 @@ static void __init init_mpr2_IRQ(void)
{
plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */
set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */
set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */
set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */
set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */
set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */
set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
irq_set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */
irq_set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */
irq_set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */
irq_set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */
irq_set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */
irq_set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
intc_set_priority(32, 13); /* IRQ0 CAN1 */
intc_set_priority(33, 13); /* IRQ0 CAN2 */

4
arch/sh/boards/mach-cayman/irq.c
查看文件

@@ -149,8 +149,8 @@ void init_cayman_irq(void)
}
for (i = 0; i < NR_EXT_IRQS; i++) {
set_irq_chip_and_handler(START_EXT_IRQS + i, &cayman_irq_type,
handle_level_irq);
irq_set_chip_and_handler(START_EXT_IRQS + i,
&cayman_irq_type, handle_level_irq);
}
/* Setup the SMSC interrupt */

3
arch/sh/boards/mach-dreamcast/irq.c
查看文件

@@ -161,7 +161,6 @@ void systemasic_irq_init(void)
return;
}
set_irq_chip_and_handler(i, &systemasic_int,
handle_level_irq);
irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq);
}
}

2
arch/sh/boards/mach-ecovec24/setup.c
查看文件

@@ -1102,7 +1102,7 @@ static int __init arch_setup(void)
/* enable TouchScreen */
i2c_register_board_info(0, &ts_i2c_clients, 1);
set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
}
/* enable CEU0 */

2
arch/sh/boards/mach-microdev/irq.c
查看文件

@@ -117,7 +117,7 @@ static struct irq_chip microdev_irq_type = {
static void __init make_microdev_irq(unsigned int irq)
{
disable_irq_nosync(irq);
set_irq_chip_and_handler(irq, &microdev_irq_type, handle_level_irq);
irq_set_chip_and_handler(irq, &microdev_irq_type, handle_level_irq);
disable_microdev_irq(irq_get_irq_data(irq));
}

2
arch/sh/boards/mach-se/7206/irq.c
查看文件

@@ -125,7 +125,7 @@ static struct irq_chip se7206_irq_chip __read_mostly = {
static void make_se7206_irq(unsigned int irq)
{
disable_irq_nosync(irq);
set_irq_chip_and_handler_name(irq, &se7206_irq_chip,
irq_set_chip_and_handler_name(irq, &se7206_irq_chip,
handle_level_irq, "level");
disable_se7206_irq(irq_get_irq_data(irq));
}

23
arch/sh/boards/mach-se/7343/irq.c
查看文件

@@ -67,19 +67,20 @@ void __init init_7343se_IRQ(void)
return;
se7343_fpga_irq[i] = irq;
set_irq_chip_and_handler_name(se7343_fpga_irq[i],
irq_set_chip_and_handler_name(se7343_fpga_irq[i],
&se7343_irq_chip,
handle_level_irq, "level");
handle_level_irq,
"level");
set_irq_chip_data(se7343_fpga_irq[i], (void *)i);
irq_set_chip_data(se7343_fpga_irq[i], (void *)i);
}
set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux);
set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux);
set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ4_IRQ, se7343_irq_demux);
set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ5_IRQ, se7343_irq_demux);
set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux);
irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux);
irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux);
irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux);
irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW);
}

15
arch/sh/boards/mach-se/7722/irq.c
查看文件

@@ -67,16 +67,17 @@ void __init init_se7722_IRQ(void)
return;
se7722_fpga_irq[i] = irq;
set_irq_chip_and_handler_name(se7722_fpga_irq[i],
irq_set_chip_and_handler_name(se7722_fpga_irq[i],
&se7722_irq_chip,
handle_level_irq, "level");
handle_level_irq,
"level");
set_irq_chip_data(se7722_fpga_irq[i], (void *)i);
irq_set_chip_data(se7722_fpga_irq[i], (void *)i);
}
set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux);
set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ0_IRQ, se7722_irq_demux);
irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ1_IRQ, se7722_irq_demux);
set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ1_IRQ, se7722_irq_demux);
irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
}

15
arch/sh/boards/mach-se/7724/irq.c
查看文件

@@ -140,17 +140,16 @@ void __init init_se7724_IRQ(void)
return;
}
set_irq_chip_and_handler_name(irq,
&se7724_irq_chip,
irq_set_chip_and_handler_name(irq, &se7724_irq_chip,
handle_level_irq, "level");
}
set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux);
set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ0_IRQ, se7724_irq_demux);
irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ1_IRQ, se7724_irq_demux);
set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ1_IRQ, se7724_irq_demux);
irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(IRQ2_IRQ, se7724_irq_demux);
set_irq_type(IRQ2_IRQ, IRQ_TYPE_LEVEL_LOW);
irq_set_chained_handler(IRQ2_IRQ, se7724_irq_demux);
irq_set_irq_type(IRQ2_IRQ, IRQ_TYPE_LEVEL_LOW);
}

8
arch/sh/boards/mach-x3proto/gpio.c
查看文件

@@ -102,8 +102,8 @@ int __init x3proto_gpio_setup(void)
spin_lock_irqsave(&x3proto_gpio_lock, flags);
x3proto_gpio_irq_map[i] = irq;
set_irq_chip_and_handler_name(irq, &dummy_irq_chip,
handle_simple_irq, "gpio");
irq_set_chip_and_handler_name(irq, &dummy_irq_chip,
handle_simple_irq, "gpio");
spin_unlock_irqrestore(&x3proto_gpio_lock, flags);
}
@@ -113,8 +113,8 @@ int __init x3proto_gpio_setup(void)
x3proto_gpio_chip.base + x3proto_gpio_chip.ngpio,
ilsel);
set_irq_chained_handler(ilsel, x3proto_gpio_irq_handler);
set_irq_wake(ilsel, 1);
irq_set_chained_handler(ilsel, x3proto_gpio_irq_handler);
irq_set_irq_wake(ilsel, 1);
return 0;