drm/radeon: update rb setup for hawaii
The formula needs to be adjusted since there are 4 RBs per SH rather than 2 as on previous asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -27,7 +27,8 @@
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#define BONAIRE_GB_ADDR_CONFIG_GOLDEN 0x12010001
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#define HAWAII_GB_ADDR_CONFIG_GOLDEN 0x12011003
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#define CIK_RB_BITMAP_WIDTH_PER_SH 2
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#define CIK_RB_BITMAP_WIDTH_PER_SH 2
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#define HAWAII_RB_BITMAP_WIDTH_PER_SH 4
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/* DIDT IND registers */
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#define DIDT_SQ_CTRL0 0x0
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@@ -1459,6 +1460,7 @@
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# define RASTER_CONFIG_RB_MAP_1 1
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# define RASTER_CONFIG_RB_MAP_2 2
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# define RASTER_CONFIG_RB_MAP_3 3
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#define PKR_MAP(x) ((x) << 8)
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#define VGT_EVENT_INITIATOR 0x28a90
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# define SAMPLE_STREAMOUTSTATS1 (1 << 0)
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