xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ASoC: tas2770: Set correct FSYNC polarity

Browse Source 
commit e9ac31f0a5d0e246b046c20348954519f91a297f upstream.

Fix setting of FSYNC polarity for DAI formats other than I2S. Also
add support for polarity inversion.

Fixes: 1a476abc72 ("tas2770: add tas2770 smart PA kernel driver")
Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Link: https://lore.kernel.org/r/20220808141246.5749-2-povik+lin@cutebit.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Martin Povišer
2022-08-08 16:12:43 +02:00
committed by Greg Kroah-Hartman
parent 4fe80492d5
commit fc57e3fde2
2 changed files with 22 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
sound/soc/codecs/tas2770.c
View File

@@ -337,7 +337,7 @@ static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
struct snd_soc_component *component = dai->component; struct snd_soc_component *component = dai->component;
struct tas2770_priv *tas2770 = struct tas2770_priv *tas2770 =
snd_soc_component_get_drvdata(component); snd_soc_component_get_drvdata(component);
u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0; u8 tdm_rx_start_slot = 0, invert_fpol = 0, fpol_preinv = 0, asi_cfg_1 = 0;
int ret; int ret;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@@ -349,9 +349,15 @@ static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
} }
switch (fmt & SND_SOC_DAIFMT_INV_MASK) { switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_IF:
invert_fpol = 1;
fallthrough;
case SND_SOC_DAIFMT_NB_NF: case SND_SOC_DAIFMT_NB_NF:
asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_RSING; asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_RSING;
break; break;
case SND_SOC_DAIFMT_IB_IF:
invert_fpol = 1;
fallthrough;
case SND_SOC_DAIFMT_IB_NF: case SND_SOC_DAIFMT_IB_NF:
asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_FALING; asi_cfg_1 |= TAS2770_TDM_CFG_REG1_RX_FALING;
break; break;
@@ -369,15 +375,19 @@ static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S: case SND_SOC_DAIFMT_I2S:
tdm_rx_start_slot = 1; tdm_rx_start_slot = 1;
fpol_preinv = 0;
break; break;
case SND_SOC_DAIFMT_DSP_A: case SND_SOC_DAIFMT_DSP_A:
tdm_rx_start_slot = 0; tdm_rx_start_slot = 0;
fpol_preinv = 1;
break; break;
case SND_SOC_DAIFMT_DSP_B: case SND_SOC_DAIFMT_DSP_B:
tdm_rx_start_slot = 1; tdm_rx_start_slot = 1;
fpol_preinv = 1;
break; break;
case SND_SOC_DAIFMT_LEFT_J: case SND_SOC_DAIFMT_LEFT_J:
tdm_rx_start_slot = 0; tdm_rx_start_slot = 0;
fpol_preinv = 1;
break; break;
default: default:
dev_err(tas2770->dev, dev_err(tas2770->dev,
@@ -391,6 +401,14 @@ static int tas2770_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
if (ret < 0) if (ret < 0)
return ret; return ret;
ret = snd_soc_component_update_bits(component, TAS2770_TDM_CFG_REG0,
TAS2770_TDM_CFG_REG0_FPOL_MASK,
(fpol_preinv ^ invert_fpol)
? TAS2770_TDM_CFG_REG0_FPOL_RSING
: TAS2770_TDM_CFG_REG0_FPOL_FALING);
if (ret < 0)
return ret;
return 0; return 0;
} }

3
sound/soc/codecs/tas2770.h
View File

@@ -41,6 +41,9 @@
#define TAS2770_TDM_CFG_REG0_31_44_1_48KHZ 0x6 #define TAS2770_TDM_CFG_REG0_31_44_1_48KHZ 0x6
#define TAS2770_TDM_CFG_REG0_31_88_2_96KHZ 0x8 #define TAS2770_TDM_CFG_REG0_31_88_2_96KHZ 0x8
#define TAS2770_TDM_CFG_REG0_31_176_4_192KHZ 0xa #define TAS2770_TDM_CFG_REG0_31_176_4_192KHZ 0xa
#define TAS2770_TDM_CFG_REG0_FPOL_MASK BIT(0)
#define TAS2770_TDM_CFG_REG0_FPOL_RSING 0
#define TAS2770_TDM_CFG_REG0_FPOL_FALING 1
/* TDM Configuration Reg1 */ /* TDM Configuration Reg1 */
#define TAS2770_TDM_CFG_REG1 TAS2770_REG(0X0, 0x0B) #define TAS2770_TDM_CFG_REG1 TAS2770_REG(0X0, 0x0B)
#define TAS2770_TDM_CFG_REG1_MASK GENMASK(5, 1) #define TAS2770_TDM_CFG_REG1_MASK GENMASK(5, 1)