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Merge tag 'drm-next-2020-10-23' of git://anongit.freedesktop.org/drm/drm

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Pull more drm fixes from Dave Airlie:
 "This should be the last round of things for rc1, a bunch of i915
  fixes, some amdgpu, more font OOB fixes and one ttm fix just found
  reading code:

  fbcon/fonts:
   - Two patches to prevent OOB access

  ttm:
   - fix for evicition value range check

  amdgpu:
   - Sienna Cichlid fixes
   - MST manager resource leak fix
   - GPU reset fix

  amdkfd:
   - Luxmark fix for Navi1x

  i915:
   - Tweak initial DPCD backlight.enabled value (Sean)
   - Initialize reserved MOCS indices (Ayaz)
   - Mark initial fb obj as WT on eLLC machines to avoid rcu lockup (Ville)
   - Support parsing of oversize batches (Chris)
   - Delay execlists processing for TGL (Chris)
   - Use the active reference on the vma during error capture (Chris)
   - Widen CSB pointer (Chris)
   - Wait for CSB entries on TGL (Chris)
   - Fix unwind for scratch page allocation (Chris)
   - Exclude low patches of stolen memory (Chris)
   - Force VT'd workarounds when running as a guest OS (Chris)
   - Drop runtime-pm assert from vpgu io accessors (Chris)"

* tag 'drm-next-2020-10-23' of git://anongit.freedesktop.org/drm/drm: (31 commits)
  drm/amdgpu: correct the cu and rb info for sienna cichlid
  drm/amd/pm: remove the average clock value in sysfs
  drm/amd/pm: fix pp_dpm_fclk
  Revert drm/amdgpu: disable sienna chichlid UMC RAS
  drm/amd/pm: fix pcie information for sienna cichlid
  drm/amdkfd: Use same SQ prefetch setting as amdgpu
  drm/amd/swsmu: correct wrong feature bit mapping
  drm/amd/psp: Fix sysfs: cannot create duplicate filename
  drm/amd/display: Avoid MST manager resource leak.
  drm/amd/display: Revert "drm/amd/display: Fix a list corruption"
  drm/amdgpu: update golden setting for sienna_cichlid
  drm/amd/swsmu: add missing feature map for sienna_cichlid
  drm/amdgpu: correct the gpu reset handling for job != NULL case
  drm/amdgpu: add rlc iram and dram firmware support
  drm/amdgpu: add function to program pbb mode for sienna cichlid
  drm/i915: Drop runtime-pm assert from vgpu io accessors
  drm/i915: Force VT'd workarounds when running as a guest OS
  drm/i915: Exclude low pages (128KiB) of stolen from use
  drm/i915/gt: Onion unwind for scratch page allocation failure
  drm/ttm: fix eviction valuable range check.
  ...
This commit is contained in:
Linus Torvalds
2020-10-23 13:56:34 -07:00
parent 9c5743dff4 b45b6fbc67
commit fc03b2d6a9
31 changed files with 528 additions and 91 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
View File

@@ -151,14 +151,17 @@ static struct cmn2asic_mapping sienna_cichlid_feature_mask_map[SMU_FEATURE_COUNT
FEA_MAP(DPM_GFXCLK),
FEA_MAP(DPM_GFX_GPO),
FEA_MAP(DPM_UCLK),
FEA_MAP(DPM_FCLK),
FEA_MAP(DPM_SOCCLK),
FEA_MAP(DPM_MP0CLK),
FEA_MAP(DPM_LINK),
FEA_MAP(DPM_DCEFCLK),
FEA_MAP(DPM_XGMI),
FEA_MAP(MEM_VDDCI_SCALING),
FEA_MAP(MEM_MVDD_SCALING),
FEA_MAP(DS_GFXCLK),
FEA_MAP(DS_SOCCLK),
FEA_MAP(DS_FCLK),
FEA_MAP(DS_LCLK),
FEA_MAP(DS_DCEFCLK),
FEA_MAP(DS_UCLK),
@@ -452,6 +455,9 @@ static int sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
case METRICS_CURR_DCEFCLK:
*value = metrics->CurrClock[PPCLK_DCEFCLK];
break;
case METRICS_CURR_FCLK:
*value = metrics->CurrClock[PPCLK_FCLK];
break;
case METRICS_AVERAGE_GFXCLK:
if (metrics->AverageGfxActivity <= SMU_11_0_7_GFX_BUSY_THRESHOLD)
*value = metrics->AverageGfxclkFrequencyPostDs;
@@ -948,19 +954,23 @@ static int sienna_cichlid_print_clk_levels(struct smu_context *smu,
freq_values[1] = cur_value;
mark_index = cur_value == freq_values[0] ? 0 :
cur_value == freq_values[2] ? 2 : 1;
if (mark_index != 1)
freq_values[1] = (freq_values[0] + freq_values[2]) / 2;
for (i = 0; i < 3; i++) {
count = 3;
if (mark_index != 1) {
count = 2;
freq_values[1] = freq_values[2];
}
for (i = 0; i < count; i++) {
size += sprintf(buf + size, "%d: %uMhz %s\n", i, freq_values[i],
i == mark_index ? "*" : "");
cur_value == freq_values[i] ? "*" : "");
}
}
break;
case SMU_PCIE:
gen_speed = smu_v11_0_get_current_pcie_link_speed(smu);
lane_width = smu_v11_0_get_current_pcie_link_width(smu);
gen_speed = smu_v11_0_get_current_pcie_link_speed_level(smu);
lane_width = smu_v11_0_get_current_pcie_link_width_level(smu);
for (i = 0; i < NUM_LINK_LEVELS; i++)
size += sprintf(buf + size, "%d: %s %s %dMhz %s\n", i,
(dpm_context->dpm_tables.pcie_table.pcie_gen[i] == 0) ? "2.5GT/s," :

27
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
View File

@@ -431,10 +431,9 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
char *buf)
{
uint32_t feature_mask[2] = { 0 };
int32_t feature_index = 0;
int feature_index = 0;
uint32_t count = 0;
uint32_t sort_feature[SMU_FEATURE_COUNT];
uint64_t hw_feature_count = 0;
int8_t sort_feature[SMU_FEATURE_COUNT];
size_t size = 0;
int ret = 0, i;
@@ -447,23 +446,31 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
size = sprintf(buf + size, "features high: 0x%08x low: 0x%08x\n",
feature_mask[1], feature_mask[0]);
memset(sort_feature, -1, sizeof(sort_feature));
for (i = 0; i < SMU_FEATURE_COUNT; i++) {
feature_index = smu_cmn_to_asic_specific_index(smu,
CMN2ASIC_MAPPING_FEATURE,
i);
if (feature_index < 0)
continue;
sort_feature[feature_index] = i;
hw_feature_count++;
}
for (i = 0; i < hw_feature_count; i++) {
size += sprintf(buf + size, "%-2s. %-20s %-3s : %-s\n",
"No", "Feature", "Bit", "State");
for (i = 0; i < SMU_FEATURE_COUNT; i++) {
if (sort_feature[i] < 0)
continue;
size += sprintf(buf + size, "%02d. %-20s (%2d) : %s\n",
count++,
smu_get_feature_name(smu, sort_feature[i]),
i,
!!smu_cmn_feature_is_enabled(smu, sort_feature[i]) ?
"enabled" : "disabled");
count++,
smu_get_feature_name(smu, sort_feature[i]),
i,
!!smu_cmn_feature_is_enabled(smu, sort_feature[i]) ?
"enabled" : "disabled");
}
return size;