arch/tile: Enable more sophisticated IRQ model for 32-bit chips.
This model is based on the on-chip interrupt model used by the TILE-Gx next-generation hardware, and interacts much more cleanly with the Linux generic IRQ layer. The change includes modifications to the Tilera hypervisor, which are reflected in the hypervisor headers in arch/tile/include/arch/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
@@ -20,12 +20,9 @@
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#ifndef _TILE_HV_H
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#define _TILE_HV_H
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#ifdef __tile__
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#include <arch/chip.h>
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#else
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/* HACK: Allow use by "tools/cpack/". */
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#include "install/include/arch/chip.h"
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#endif
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#include <hv/pagesize.h>
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/* Linux builds want unsigned long constants, but assembler wants numbers */
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#ifdef __ASSEMBLER__
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@@ -39,7 +36,6 @@
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#define __HV_SIZE_ONE 1UL
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#endif
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/** The log2 of the span of a level-1 page table, in bytes.
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*/
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#define HV_LOG2_L1_SPAN 32
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@@ -48,21 +44,11 @@
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*/
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#define HV_L1_SPAN (__HV_SIZE_ONE << HV_LOG2_L1_SPAN)
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/** The log2 of the size of small pages, in bytes. This value should
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* be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL).
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*/
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#define HV_LOG2_PAGE_SIZE_SMALL 16
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/** The size of small pages, in bytes. This value should be verified
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* at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL).
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*/
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#define HV_PAGE_SIZE_SMALL (__HV_SIZE_ONE << HV_LOG2_PAGE_SIZE_SMALL)
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/** The log2 of the size of large pages, in bytes. This value should be
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* verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE).
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*/
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#define HV_LOG2_PAGE_SIZE_LARGE 24
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/** The size of large pages, in bytes. This value should be verified
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* at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE).
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*/
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@@ -93,7 +79,7 @@
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#define HV_DISPATCH_ENTRY_SIZE 32
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/** Version of the hypervisor interface defined by this file */
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#define _HV_VERSION 10
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#define _HV_VERSION 11
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/* Index into hypervisor interface dispatch code blocks.
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*
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@@ -253,8 +239,10 @@
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/** hv_set_command_line */
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#define HV_DISPATCH_SET_COMMAND_LINE 47
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/** hv_dev_register_intr_state */
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#define HV_DISPATCH_DEV_REGISTER_INTR_STATE 48
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#if !CHIP_HAS_IPI()
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/** hv_clear_intr */
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#define HV_DISPATCH_CLEAR_INTR 48
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/** hv_enable_intr */
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#define HV_DISPATCH_ENABLE_INTR 49
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@@ -262,20 +250,30 @@
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/** hv_disable_intr */
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#define HV_DISPATCH_DISABLE_INTR 50
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/** hv_raise_intr */
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#define HV_DISPATCH_RAISE_INTR 51
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/** hv_trigger_ipi */
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#define HV_DISPATCH_TRIGGER_IPI 51
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#define HV_DISPATCH_TRIGGER_IPI 52
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#endif /* !CHIP_HAS_IPI() */
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/** hv_store_mapping */
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#define HV_DISPATCH_STORE_MAPPING 52
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#define HV_DISPATCH_STORE_MAPPING 53
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/** hv_inquire_realpa */
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#define HV_DISPATCH_INQUIRE_REALPA 53
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#define HV_DISPATCH_INQUIRE_REALPA 54
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/** hv_flush_all */
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#define HV_DISPATCH_FLUSH_ALL 54
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#define HV_DISPATCH_FLUSH_ALL 55
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#if CHIP_HAS_IPI()
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/** hv_get_ipi_pte */
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#define HV_DISPATCH_GET_IPI_PTE 56
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#endif
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/** One more than the largest dispatch value */
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#define _HV_DISPATCH_END 55
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#define _HV_DISPATCH_END 57
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#ifndef __ASSEMBLER__
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@@ -484,21 +482,6 @@ typedef enum {
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*/
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int hv_confstr(HV_ConfstrQuery query, HV_VirtAddr buf, int len);
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/** State object used to enable and disable one-shot and level-sensitive
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* interrupts. */
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typedef struct
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{
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#if CHIP_VA_WIDTH() > 32
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__hv64 opaque[2]; /**< No user-serviceable parts inside */
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#else
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__hv32 opaque[2]; /**< No user-serviceable parts inside */
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#endif
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}
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HV_IntrState;
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/** A set of interrupts. */
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typedef __hv32 HV_IntrMask;
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/** Tile coordinate */
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typedef struct
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{
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@@ -509,34 +492,51 @@ typedef struct
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int y;
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} HV_Coord;
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#if CHIP_HAS_IPI()
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/** Get the PTE for sending an IPI to a particular tile.
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*
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* @param tile Tile which will receive the IPI.
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* @param pl Indicates which IPI registers: 0 = IPI_0, 1 = IPI_1.
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* @param pte Filled with resulting PTE.
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* @result Zero if no error, non-zero for invalid parameters.
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*/
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int hv_get_ipi_pte(HV_Coord tile, int pl, HV_PTE* pte);
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#else /* !CHIP_HAS_IPI() */
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/** A set of interrupts. */
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typedef __hv32 HV_IntrMask;
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/** The low interrupt numbers are reserved for use by the client in
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* delivering IPIs. Any interrupt numbers higher than this value are
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* reserved for use by HV device drivers. */
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#define HV_MAX_IPI_INTERRUPT 7
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/** Register an interrupt state object. This object is used to enable and
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* disable one-shot and level-sensitive interrupts. Once the state is
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* registered, the client must not read or write the state object; doing
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* so will cause undefined results.
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/** Enable a set of device interrupts.
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*
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* @param intr_state Pointer to interrupt state object.
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* @return HV_OK on success, or a hypervisor error code.
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*/
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HV_Errno hv_dev_register_intr_state(HV_IntrState* intr_state);
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/** Enable a set of one-shot and level-sensitive interrupts.
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*
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* @param intr_state Pointer to interrupt state object.
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* @param enab_mask Bitmap of interrupts to enable.
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*/
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void hv_enable_intr(HV_IntrState* intr_state, HV_IntrMask enab_mask);
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void hv_enable_intr(HV_IntrMask enab_mask);
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/** Disable a set of one-shot and level-sensitive interrupts.
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/** Disable a set of device interrupts.
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*
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* @param intr_state Pointer to interrupt state object.
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* @param disab_mask Bitmap of interrupts to disable.
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*/
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void hv_disable_intr(HV_IntrState* intr_state, HV_IntrMask disab_mask);
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void hv_disable_intr(HV_IntrMask disab_mask);
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/** Clear a set of device interrupts.
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*
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* @param clear_mask Bitmap of interrupts to clear.
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*/
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void hv_clear_intr(HV_IntrMask clear_mask);
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/** Assert a set of device interrupts.
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*
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* @param assert_mask Bitmap of interrupts to clear.
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*/
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void hv_assert_intr(HV_IntrMask assert_mask);
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/** Trigger a one-shot interrupt on some tile
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*
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@@ -547,6 +547,8 @@ void hv_disable_intr(HV_IntrState* intr_state, HV_IntrMask disab_mask);
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*/
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HV_Errno hv_trigger_ipi(HV_Coord tile, int interrupt);
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#endif // !CHIP_HAS_IPI()
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/** Store memory mapping in debug memory so that external debugger can read it.
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* A maximum of 16 entries can be stored.
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*
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@@ -1010,6 +1012,13 @@ int hv_console_write(HV_VirtAddr bytes, int len);
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* it will return to the code which was interrupted by the INTCTRL_1
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* interrupt.
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*
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* Under some circumstances, the firing of INTCTRL_1 can race with
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* the lowering of a device interrupt. In such a case, the
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* hv_downcall_dispatch service may issue an iret instruction instead
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* of entering one of the client's actual downcall-handling interrupt
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* vectors. This will return execution to the location that was
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* interrupted by INTCTRL_1.
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*
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* Any saving of registers should be done by the actual handling
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* vectors; no registers should be changed by the INTCTRL_1 handler.
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* In particular, the client should not use a jal instruction to invoke
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32
arch/tile/include/hv/pagesize.h
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32
arch/tile/include/hv/pagesize.h
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@@ -0,0 +1,32 @@
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/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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/**
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* @file pagesize.h
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*/
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#ifndef _HV_PAGESIZE_H
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#define _HV_PAGESIZE_H
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/** The log2 of the size of small pages, in bytes. This value should
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* be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL).
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*/
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#define HV_LOG2_PAGE_SIZE_SMALL 16
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/** The log2 of the size of large pages, in bytes. This value should be
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* verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE).
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*/
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#define HV_LOG2_PAGE_SIZE_LARGE 24
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#endif /* _HV_PAGESIZE_H */
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