ath6kl: Fix missing gpio pin 9 configuration

GPIO pin 9 also needs to be configured along with other gpio
pins to avoid sdio crc errors. I've not experienced any issue
with missing this particular gpio pin configuration, found dunring
code review. This can potentially improve rx performance.

Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
此提交包含在:
Vasanthakumar Thiagarajan
2012-05-22 12:52:48 +05:30
提交者 Kalle Valo
父節點 33a6664a6e
當前提交 fa338be062
共有 2 個檔案被更改,包括 7 行新增0 行删除

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@@ -1392,6 +1392,12 @@ static int ath6kl_init_upload(struct ath6kl *ar)
ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
ath6kl_err("temporary war to avoid sdio crc error\n");
param = 0x28;
address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
status = ath6kl_bmi_reg_write(ar, address, param);
if (status)
return status;
param = 0x20;
address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;