ath6kl: Fix missing gpio pin 9 configuration
GPIO pin 9 also needs to be configured along with other gpio pins to avoid sdio crc errors. I've not experienced any issue with missing this particular gpio pin configuration, found dunring code review. This can potentially improve rx performance. Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
此提交包含在:
@@ -1392,6 +1392,12 @@ static int ath6kl_init_upload(struct ath6kl *ar)
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ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
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ath6kl_err("temporary war to avoid sdio crc error\n");
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param = 0x28;
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address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
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status = ath6kl_bmi_reg_write(ar, address, param);
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if (status)
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return status;
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param = 0x20;
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address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
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