xhci: Add Intel extended cap / otg phy mux handling
The xHCI controller on various Intel SoCs has an extended cap mmio-range which contains registers to control the muxing to the xHCI (host mode) or the dwc3 (device mode) and vbus-detection for the otg usb-phy. Having a role-sw driver included in the xHCI code (under drivers/usb/host) is not desirable. So this commit adds a simple handler for this extended capability, which creates a platform device with the caps mmio region as resource, this allows us to write a separate platform role-sw driver for the role-switch. Note this commit adds a call to the new xhci_ext_cap_init() function to xhci_pci_probe(), it is added here because xhci_ext_cap_init() must be called only once. If in the future we also want to handle ext-caps on non pci xHCI HCDs from xhci_ext_cap_init() a call to it should also be added to other bus probe paths. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman

parent
d0a0fa9d74
commit
fa31b3cb2a
@@ -178,6 +178,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
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xhci->quirks |= XHCI_SSIC_PORT_UNUSED;
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xhci->quirks |= XHCI_INTEL_USB_ROLE_SW;
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}
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if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
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(pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
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@@ -311,6 +312,10 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
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goto dealloc_usb2_hcd;
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}
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retval = xhci_ext_cap_init(xhci);
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if (retval)
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goto put_usb3_hcd;
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retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
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IRQF_SHARED);
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if (retval)
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