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net: phy: mscc: split the driver into separate files

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This patch splits the MSCC driver into separate files, per
functionality, to improve readability and maintenance as the codebase
grew a lot. The MACsec code is moved to a dedicated mscc_macsec.c file,
the mscc.c file is renamed to mscc_main.c to keep the driver binary to
be named mscc and common definition are put into a new mscc.h header.

Most of the code was just moved around, except for a few exceptions:
- Header inclusions were reworked to only keep what's needed.
- Three helpers were created in the MACsec code, to avoid #ifdef's in
  the main C file: vsc8584_macsec_init, vsc8584_handle_macsec_interrupt
  and vsc8584_config_macsec_intr.

The patch should not introduce any functional modification.

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Antoine Tenart
2020-03-13 10:48:01 +01:00
committed by David S. Miller
parent da80aa52d0
commit fa164e40c5
5 changed files with 1514 additions and 1461 deletions
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58
drivers/net/phy/mscc/mscc_macsec.h
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@@ -8,6 +8,8 @@
#ifndef _MSCC_OCELOT_MACSEC_H_
#define _MSCC_OCELOT_MACSEC_H_
#include <net/macsec.h>
#define MSCC_MS_MAX_FLOWS 16
#define CONTROL_TYPE_EGRESS 0x6
@@ -58,6 +60,62 @@ enum mscc_macsec_validate_levels {
MSCC_MS_VALIDATE_STRICT = 2,
};
enum macsec_bank {
FC_BUFFER = 0x04,
HOST_MAC = 0x05,
LINE_MAC = 0x06,
IP_1588 = 0x0e,
MACSEC_INGR = 0x38,
MACSEC_EGR = 0x3c,
};
struct macsec_flow {
struct list_head list;
enum mscc_macsec_destination_ports port;
enum macsec_bank bank;
u32 index;
int assoc_num;
bool has_transformation;
/* Highest takes precedence [0..15] */
u8 priority;
u8 key[MACSEC_KEYID_LEN];
union {
struct macsec_rx_sa *rx_sa;
struct macsec_tx_sa *tx_sa;
};
/* Matching */
struct {
u8 sci:1;
u8 tagged:1;
u8 untagged:1;
u8 etype:1;
} match;
u16 etype;
/* Action */
struct {
u8 bypass:1;
u8 drop:1;
} action;
};
#define MSCC_EXT_PAGE_MACSEC_17 17
#define MSCC_EXT_PAGE_MACSEC_18 18
#define MSCC_EXT_PAGE_MACSEC_19 19
#define MSCC_PHY_MACSEC_19_REG_ADDR(x) (x)
#define MSCC_PHY_MACSEC_19_TARGET(x) ((x) << 12)
#define MSCC_PHY_MACSEC_19_READ BIT(14)
#define MSCC_PHY_MACSEC_19_CMD BIT(15)
#define MSCC_EXT_PAGE_MACSEC_20 20
#define MSCC_PHY_MACSEC_20_TARGET(x) (x)
#define MSCC_MS_XFORM_REC(x, y) (((x) << 5) + (y))
#define MSCC_MS_ENA_CFG 0x800
#define MSCC_MS_FC_CFG 0x804