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x86/hw_breakpoint: Prevent data breakpoints on per_cpu cpu_tss_rw

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cpu_tss_rw is not directly referenced by hardware, but cpu_tss_rw is
accessed in CPU entry code, especially when #DB shifts its stacks.

If a data breakpoint would be set on cpu_tss_rw.x86_tss.ist[IST_INDEX_DB],
it would cause recursive #DB ending up in a double fault.

Add it to the list of protected items.

Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200526014221.2119-4-laijs@linux.alibaba.com
Link: https://lkml.kernel.org/r/20200529213320.897976479@infradead.org
This commit is contained in:
Lai Jiangshan
2020-05-29 23:27:31 +02:00
committed by Thomas Gleixner
parent 97417cb9ad
commit f9fe0b89f0
1 changed files with 9 additions and 0 deletions
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9
arch/x86/kernel/hw_breakpoint.c
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@@ -255,6 +255,15 @@ static inline bool within_cpu_entry(unsigned long addr, unsigned long end)
if (within_area(addr, end, (unsigned long)get_cpu_gdt_rw(cpu), if (within_area(addr, end, (unsigned long)get_cpu_gdt_rw(cpu),
GDT_SIZE)) GDT_SIZE))
return true; return true;
/*
* cpu_tss_rw is not directly referenced by hardware, but
* cpu_tss_rw is also used in CPU entry code,
*/
if (within_area(addr, end,
(unsigned long)&per_cpu(cpu_tss_rw, cpu),
sizeof(struct tss_struct)))
return true;
} }
return false; return false;