firmware: xilinx: Add clock APIs
Add clock APIs to control clocks through firmware interface. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@@ -35,6 +35,15 @@
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enum pm_api_id {
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PM_GET_API_VERSION = 1,
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PM_QUERY_DATA = 35,
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PM_CLOCK_ENABLE,
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PM_CLOCK_DISABLE,
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PM_CLOCK_GETSTATE,
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PM_CLOCK_SETDIVIDER,
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PM_CLOCK_GETDIVIDER,
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PM_CLOCK_SETRATE,
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PM_CLOCK_GETRATE,
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PM_CLOCK_SETPARENT,
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PM_CLOCK_GETPARENT,
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};
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/* PMU-FW return status codes */
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@@ -48,8 +57,20 @@ enum pm_ret_status {
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XST_PM_ABORT_SUSPEND,
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};
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enum pm_ioctl_id {
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IOCTL_SET_PLL_FRAC_MODE = 8,
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IOCTL_GET_PLL_FRAC_MODE,
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IOCTL_SET_PLL_FRAC_DATA,
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IOCTL_GET_PLL_FRAC_DATA,
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};
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enum pm_query_id {
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PM_QID_INVALID,
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PM_QID_CLOCK_GET_NAME,
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PM_QID_CLOCK_GET_TOPOLOGY,
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PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS,
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PM_QID_CLOCK_GET_PARENTS,
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PM_QID_CLOCK_GET_ATTRIBUTES,
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};
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/**
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@@ -69,6 +90,15 @@ struct zynqmp_pm_query_data {
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struct zynqmp_eemi_ops {
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int (*get_api_version)(u32 *version);
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int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
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int (*clock_enable)(u32 clock_id);
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int (*clock_disable)(u32 clock_id);
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int (*clock_getstate)(u32 clock_id, u32 *state);
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int (*clock_setdivider)(u32 clock_id, u32 divider);
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int (*clock_getdivider)(u32 clock_id, u32 *divider);
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int (*clock_setrate)(u32 clock_id, u64 rate);
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int (*clock_getrate)(u32 clock_id, u64 *rate);
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int (*clock_setparent)(u32 clock_id, u32 parent_id);
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int (*clock_getparent)(u32 clock_id, u32 *parent_id);
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};
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#if IS_REACHABLE(CONFIG_ARCH_ZYNQMP)
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