xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

net/mlx5_core: Add setting ATOMIC endian mode

Browse Source 
HW is capable of 2 requestor endianness modes for standard 8 Bytes
atomic: BE (0x0) and host endianness (0x1). Read the supported modes
from hca atomic capabilities and configure HW to host endianness mode if
supported.

Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com>
Reviewed-by: Yishai Hadas <yishaih@mellanox.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Eran Ben Elisha
2015-12-14 16:34:09 +02:00
committed by Doug Ledford
parent 67f1aee6f4
commit f91e6d8941
2 changed files with 70 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
include/linux/mlx5/mlx5_ifc.h
View File

@@ -66,6 +66,11 @@ enum {
MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
};
enum {
MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
};
enum {
MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
@@ -527,21 +532,24 @@ enum {
struct mlx5_ifc_atomic_caps_bits {
u8 reserved_0[0x40];
u8 atomic_req_endianness[0x1];
u8 reserved_1[0x1f];
u8 atomic_req_8B_endianess_mode[0x2];
u8 reserved_1[0x4];
u8 supported_atomic_req_8B_endianess_mode_1[0x1];
u8 reserved_2[0x20];
u8 reserved_2[0x19];
u8 reserved_3[0x10];
u8 atomic_operations[0x10];
u8 reserved_3[0x20];
u8 reserved_4[0x10];
u8 atomic_size_qp[0x10];
u8 atomic_operations[0x10];
u8 reserved_5[0x10];
u8 atomic_size_qp[0x10];
u8 reserved_6[0x10];
u8 atomic_size_dc[0x10];
u8 reserved_6[0x720];
u8 reserved_7[0x720];
};
struct mlx5_ifc_odp_cap_bits {