OMAPDSS: DSI: Add FEAT_DSI_PLL_SELFREQDCO
Add FEAT_DSI_PLL_SELFREQDCO. OMAP5's DSI PLL has a new configuration option that needs to be programmed depending on the PLL's output clock frequency. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@@ -1671,18 +1671,22 @@ int dsi_pll_set_clock_div(struct platform_device *dsidev,
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BUG_ON(cinfo->fint < dsi->fint_min || cinfo->fint > dsi->fint_max);
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l = dsi_read_reg(dsidev, DSI_PLL_CONFIGURATION2);
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if (dss_has_feature(FEAT_DSI_PLL_FREQSEL)) {
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f = cinfo->fint < 1000000 ? 0x3 :
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cinfo->fint < 1250000 ? 0x4 :
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cinfo->fint < 1500000 ? 0x5 :
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cinfo->fint < 1750000 ? 0x6 :
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0x7;
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l = FLD_MOD(l, f, 4, 1); /* DSI_PLL_FREQSEL */
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} else if (dss_has_feature(FEAT_DSI_PLL_SELFREQDCO)) {
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f = cinfo->clkin4ddr < 1000000000 ? 0x2 : 0x4;
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l = FLD_MOD(l, f, 4, 1); /* PLL_SELFREQDCO */
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}
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l = dsi_read_reg(dsidev, DSI_PLL_CONFIGURATION2);
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if (dss_has_feature(FEAT_DSI_PLL_FREQSEL))
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l = FLD_MOD(l, f, 4, 1); /* DSI_PLL_FREQSEL */
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l = FLD_MOD(l, 1, 13, 13); /* DSI_PLL_REFEN */
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l = FLD_MOD(l, 0, 14, 14); /* DSIPHY_CLKINEN */
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l = FLD_MOD(l, 1, 20, 20); /* DSI_HSDIVBYPASS */
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