ARM: tegra: Tegra30 speedo-based process identification
This patch adds speedo-based process identification support for Tegra30. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra3/Tegra30/ in log print, s/T30/Tegra30/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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committed by
Stephen Warren

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25cd5a3914
commit
f8ddda713b
@@ -30,11 +30,13 @@
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#define FUSE_SKU_INFO 0x110
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#define TEGRA20_FUSE_SPARE_BIT 0x200
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#define TEGRA30_FUSE_SPARE_BIT 0x244
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int tegra_sku_id;
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int tegra_cpu_process_id;
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int tegra_core_process_id;
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int tegra_chip_id;
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int tegra_cpu_speedo_id; /* only exist in Tegra30 and later */
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int tegra_soc_speedo_id;
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enum tegra_revision tegra_revision;
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@@ -120,13 +122,18 @@ void tegra_init_fuse(void)
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id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
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tegra_chip_id = (id >> 8) & 0xff;
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tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
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switch (tegra_chip_id) {
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case TEGRA20:
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tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
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tegra_init_speedo_data = &tegra20_init_speedo_data;
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break;
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case TEGRA30:
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tegra_fuse_spare_bit = TEGRA30_FUSE_SPARE_BIT;
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tegra_init_speedo_data = &tegra30_init_speedo_data;
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break;
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default:
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pr_warn("Tegra: unknown chip id %d\n", tegra_chip_id);
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tegra_fuse_spare_bit = TEGRA20_FUSE_SPARE_BIT;
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tegra_init_speedo_data = &tegra_get_process_id;
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}
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